PI7C7300ANAE Pericom Semiconductor, PI7C7300ANAE Datasheet - Page 40
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PI7C7300ANAE
Manufacturer Part Number
PI7C7300ANAE
Description
IC PCI-PCI BRIDGE 3PORT 272-BGA
Manufacturer
Pericom Semiconductor
Datasheet
1.PI7C7300ANAE.pdf
(109 pages)
Specifications of PI7C7300ANAE
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
272-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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4.9.4.3
4.10
5
5.1
PI7C7300A returns a target disconnect to an initiator when one of the following
conditions is met:
!
!
!
See Section 4.6.4 for a description of write address boundaries, and Section 4.7.3 for a
description of read address boundaries.
TARGET ABORT
PI7C7300A returns a target abort to an initiator when one of the following conditions is
met:
!
When PI7C7300A returns a target abort to the initiator, it sets the signaled target abort
bit in the status register corresponding to the initiator interface.
CONCURRENT MODE OPERATION
The Bridge can be configured to run in concurrent operation. Concurrent operation is
defined as cycles going from one device on one secondary bus to another device on the
same or other secondary bus. This off-loads traffic from the primary bus, allowing other
traffic to run on the primary bus concurrently.
The Bridge is already configured to handle concurrent operation. However, the devices
themselves need to be configured to do so. Meaning, device drivers for the specific
device used will have to be configured to perform the operation. Please see section 5.1
for more information on addressing.
ADDRESS DECODING
PI7C7300A uses three address ranges that control I/O and memory transaction
forwarding. These address ranges are defined by base and limit address registers in the
configuration space. This chapter describes these address ranges, as well as ISA-mode
and VGA-addressing support.
ADDRESS RANGES
PI7C7300A uses the following address ranges that determine which I/O and memory
transactions are forwarded from the primary PCI bus to the secondary PCI bus, and from
the secondary bus to the primary bus:
PI7C7300A hits an internal address boundary.
PI7C7300A cannot accept any more write data.
PI7C7300A has no more read data to deliver.
PI7C7300A is returning a target abort from the intended target.
Page 40 OF 109
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
09/25/03 Revision 1.09
PI7C7300A
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