TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 70

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

3. PCI/X Interface > PCI Mode
Figure 10: PCI Target Image Programmable Address Offset
3.2.1.3
70
PCI/X
Address
The incoming address is within the target images window if the incoming address is greater
than or equal to the starting address and less than or equal to the ending address.
Figure 10
PCI Transactions
All transactions through the PCI Target are completed on the VMEbus in the same order that
they are completed on the PCI bus. A read transaction forces all previously issued posted
write transactions to be flushed from the buffers. All posted write transfers are completed
before a read is begun to make sure that all transfers are completed in the order issued. For
more information on transaction mapping, refer to
Commands
The PCI Target responds to the following PCI bus commands:
•
•
•
•
•
•
•
•
Memory read
Memory write
Configuration read
Configuration write
Memory read multiple
Dual address cycle
— 64-bit address transactions
Memory read line
Memory write and invalidate
A63
A63
shows the programmable starting address, ending address, and translation offset.
All programmable target images should decode unique address ranges. However,
if the target images overlap, slave image zero has the highest priority and slave
image seven has the lowest priority.
Starting Address
Ending Address
A16
A16
A63
Translation Offset
Section 3.2.1.2 on page
Tsi148 PCI/X-to-VME Bus Bridge User Manual
A16
69.
80A3020_MA001_13
VME
Address