TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 315
TSI148-133CL
Manufacturer Part Number
TSI148-133CL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets
1.TSI148-133CL.pdf
(391 pages)
2.TSI148-133CL.pdf
(2 pages)
3.TSI148-133CL.pdf
(12 pages)
Specifications of TSI148-133CL
Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Package Type
BGA
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1906
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Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
MB1EO (Mail Box 1 Interrupt Enable Out): When this bit is high, the mail box 1 interrupt
is enabled to the one of the four INTx pins.
MB0EO (Mail Box 0 Interrupt Enable Out): When this bit is high, the mail box 0 interrupt
is enabled to the one of the four INTx pins.
PERREO (PCI/X Bus Error Enable Out): When this bit is high, the PCI/X bus error
interrupt is enabled to the one of the four INTx pins.
VERREO (VMEbus Error Interrupt Enable Out): When this bit is high, the VMEbus
error interrupt is enabled to the one of the four INTx pins.
VIEEO (VMEbus IRQ Edge Interrupt Enable Out): When this bit is high, the VMEbus
IRQ edge interrupt is enabled to the one of the four INTx pins.
IACKEO (Interrupt Acknowledge Interrupt Enable Out): When this bit is high, the
VMEbus interrupt acknowledge interrupt is enabled to the one of the four INTx pins.
SYSFLEO (System Fail Interrupt Enable Out): When this bit is high, the VMEbus system
fail interrupt is enabled to the one of the four INTx pins.
ACFLEO (AC Fail Interrupt Enable Out): When this bit is high, the AC fail interrupt is
enabled to the one of the four INTx pins.
IRQ7EO (IRQ7 Enable Out): When this bit is high, the VMEbus IRQ[7]I_ interrupt is
enabled to the one of the four INTx pins.
IRQ6EO (IRQ6 Enable Out): When this bit is high, the VMEbus IRQ[6]I_ interrupt is
enabled to the one of the four INTx pins.
IRQ5EO (IRQ5 Enable Out): When this bit is high, the VMEbus IRQ[5]I_ interrupt is
enabled to the one of the four INTx pins.
IRQ4EO (IRQ4 Enable Out): When this bit is high, the VMEbus IRQ[4]I_ interrupt is
enabled to the one of the four INTx pins.
IRQ3EO (IRQ3 Enable Out): When this bit is high, the VMEbus IRQ[3]I_ interrupt is
enabled to the one of the four INTx pins.
IRQ2EO (IRQ2 Enable Out): When this bit is high, the VMEbus IRQ[2]I_ interrupt is
enabled to the one of the four INTx pins.
IRQ1EO (IRQ1 Enable Out): When this bit is high, the VMEbus IRQ[1]I_ interrupt is
enabled to the one of the four INTx pins.
10. Registers > Register Map
315
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