TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 40

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

1. Functional Overview > DMA Controllers
1.6
40
DMA Controllers
Tsi148 has two internal, independent, single channel DMA controllers for high performance
data transfers. DMA operations between the source and destination bus are managed as
separate transactions through the Linkage Module. Transactions are buffered in each DMA
controller’s 64-bit by1024 (8 Kbyte) entry buffer . The Tsi148 DMA Controllers support both
Direct mode and Linked-list mode operation.
There are no restrictions on addressing alignment or transfer sizes (transfer sizes can range
anywhere from 1 byte to 4 Gbytes). There is support for transfer throttling through
programmable transaction block sizes. There is also a back-off timer, which enables DMA
transfers to occur in certain (programmable) periods of time. Parameters for DMA transfers
are configured by software, or linked-list, activity.
The principal mechanism for DMA transfers is the same for operations in either direction
(PCI-to-VMEbus, or VMEbus-to-PCI), only the identity of the source and destination bus
changes. In a DMA transfer, the Tsi148 gains control of the source bus and reads data into
the read buffer of the source master, then passes the data through the Linkage Module and
into the DMA data buffer. The DMA controller then requests a transaction through the
linkage and passes the data through the linkage and into the destination write buffer. The
destination master then acquires the destination bus and empties its write buffer.
The DMA controller can be programmed to perform multiple blocks of transfers using
Linked-list mode. The DMA works through the transfers in the linked-list following
pointers at the end of each linked-list entry. Linked-list operation is initiated through a
pointer in an internal Tsi148 register, but the linked-list itself resides in PCI/X memory.
For more information on Tsi148’s DMA Controller refer to
Tsi148 PCI/X-to-VME Bus Bridge User Manual
Section 4. on page
80A3020_MA001_13
95.