TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 279
TSI148-133CL
Manufacturer Part Number
TSI148-133CL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets
1.TSI148-133CL.pdf
(391 pages)
2.TSI148-133CL.pdf
(2 pages)
3.TSI148-133CL.pdf
(12 pages)
Specifications of TSI148-133CL
Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Package Type
BGA
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1906
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TSI148-133CL
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
TSI148-133CLY
Manufacturer:
TUNDRA
Quantity:
355
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10.4.49
Table 98: Inbound Translation Ending Address Lower (0-7) Register
Inbound Translation Ending Address Lower (0-7) Register
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
Register Name: IITEALx
Reset Value: 0x00000000
31:24
23:16
15:8
31:4
Bits
Bits
7:0
3:0
Reserved
ENDAL
Inbound Translation Ending Address Lower (0-7) Registers
The Inbound Translation Ending Address Lower Registers (ITEAL0-ITEAL7) contain
address information associated with the mapping of VMEbus space to PCI/X space. The
inbound VMEbus address is decoded when the VMEbus address is greater than or equal to the
start address and less than or equal to the end address.
ENDL (End Address Lower): If the VMEbus address bus is 64-bit or 32-bit, then the end
address lower bits 31 to 16 are compared with VMEbus address bits 31 to 16 and the
granularity is 64 Kbytes. If the VMEbus address is 24-bits, then the end address lower bits 23
to 12 are compared with VMEbus address bits 23 to 12 and the granularity is 4 Kbytes. If the
VMEbus address is 16-bits, then the end address lower bits 15 to 4 are compared with
VMEbus address bits 15 to 4 and the granularity is 16 bytes.
7
Name
6
Start Address Lower
N/A
ENDAL
5
Function
4
ENDAL
ENDAL
ENDAL
3
Register Offset: ITEAL0: CRG + 0x30C
2
PCFS
Space
Type
R/W
Reserved
R
10. Registers > Register Map
ITEAL5: CRG + 0x3AC
ITEAL6: CRG + 0x3CC
ITEAL7: CRG + 0x3EC
ITEAL1: CRG + 0x32C
ITEAL2: CRG + 0x34C
ITEAL3: CRG + 0x36C
ITEAL4: CRG + 0x38C
1
Reset
P/S/L
N/A
By
Reset
Value
0x00
0x00
0
279
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