TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 64

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

2. VME Interface > VME Master
2.3.6.5
2.3.6.6
64
Broadcast Interrupt
Although the Tsi148 IRQ[1] and IRQ[2] signals can be used as VMEbus interrupts (as
defined by the American National Standard for VME64 Extensions), the Tsi148 can also use
one of the IRQ[1] or IRQ[2] signals as a broadcast interrupt. The broadcast interrupt allows a
board to send an interrupt to multiple boards. Since all the boards receive the interrupt at the
same time, the interrupt can be used as a synchronizing event.
In this mode, the transmitting board transmits a pulse on the IRQ[1] or IRQ[2] signal line. The
receiving boards are programmed to treat the IRQ[1]_ or IRQ[2]_ signal as an edge sensitive
interrupt. There is no VMEbus interrupt acknowledge cycle for a broadcast interrupt. The
interrupt is treated as a local interrupt on the receiving boards.
An interrupt can be broadcast in multiple ways. Either the pulse generator can be programmed
to generate a single broadcast interrupt or the programmable clock generator can be used to
generate periodic broadcast interrupts. When the pulse generator is enabled and the BIP bit is
set in the VMEbus Interrupt Control register (see
interrupt is broadcast.
The Broadcast Pulse Generator Timer register (see
program the pulse width. A new pulse should not be generated when the BIPs bit is set in the
VMEbus Interrupt Control register. When the programmable clock generator is enabled,
periodic interrupts are broadcast. The Broadcast Programmable Clock Timer register (see
Section 10.4.68 on page
64-bit Counter
There is a 64-bit counter which can be incremented by a signal on the IRQ[1]_ or IRQ[2]_
signal line. In this mode, one board transmits a clock on either the IRQ[1] or IRQ[2] signal
lines and the receiving boards use this clock signal to increment their 64-bit counter. This
feature provides a reference counter that is synchronized on all the boards.
The transmitting board can also be a receiving board. The clock can be derived from the
programmable clock generator or the 0.98 MHz clock. When the 0.98 MHz clock is used, the
64-bit counter can provide a unique time stamp every 1.02 s.
SYSFAIL Operation
For more information on SYSFAIL functionality refer to
VMEbus Configuration
For more information on VMEbus configuration refer to
The transmitting board can also be a receiving board.
305) is used to program the interrupt rate.
Section 10.4.69 on page
Section 10.4.67 on page
Tsi148 PCI/X-to-VME Bus Bridge User Manual
Section 5.4.2 on page
Section 5.4.2 on page
306), a single
80A3020_MA001_13
304) is used to
126.
126.