TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 254

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

10. Registers > Register Map
254
SRESET (System Reset): When this bit is set, the SRSTO signal is asserted. This bit is
automatically cleared if SRSTI is connected to SRSTO through a transceiver.
LRESET (Local Reset): When this bit is set, the LRSTO_ signal is asserted. This bit is
automatically cleared. Before this bit is set, the software should set the VS bit and wait for the
VSA bit to be set.
SFAILAI (SYSFAIL Auto Slot ID): When this bit is set, the SFAILO signal is asserted.
When this bit is cleared, the SFAILO signal is negated. When the Auto Slot ID function is
enabled, this bit is set by SRSTI_. It is cleared automatically when the auto clear mode is
selected. Otherwise it is cleared by software.
BID (Broadcast ID): This field defines the broadcast ID which is used to receive 2eSST
broadcast transfers. This field is compared with the broadcast slave select bits which are
transmitted during address phase three of a 2eSST transfer. A value of one corresponds to
address bit one set, a value of two corresponds to address bit two set and so on through a value
of 21. If this field is zero, the VME Slave does not respond to a 2eSST broadcast transfer.
ATOEN (Arbiter Time-out Enable): When this bit is set, the VMEbus arbiter time-out
function is enabled. When the time-out function is enabled, the arbiter asserts BBSY* if a bus
grant out signal remains asserted for 16 microseconds. This causes the arbiter to re-arbitrate.
ROBIN (Round Robin): When this bit is set, the VMEbus arbiter operates in round robin
mode. When this bit is cleared, the VMEbus arbiter operates in priority mode. This bit may be
set or cleared at any time.
GTO (VMEbus Global Time-out): These bits define the VMEbus Global Time-out period.
Table 81: VMEbus Global Time-out
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
GTO
1024 s
2048 s
128 s
256 s
512 s
Time
16 s
32 s
64 s
8 s
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13