TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 121

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
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Setting the LRESET bit in the VCTRL register (see
page
LRSTO_ signal remains asserted for a minimum of 15us. Because this bit only
resets the board and not the entire system, setting this bit can have side effects.
For example, if there are VMEbus transfers in progress, local resources required
to complete the transfers are reset and unavailable. This may cause aborted
VMEbus cycles, VMEbus time-outs, or a VMEbus lockup. To avoid these side
effects, the following rules must be used when setting the LRESET bit:
1. The LRESET bit must only be used in exceptional cases and not during
normal system operation.
2. The software must set VMEbus Stop
Acknowledge bit (VSA) to be set (see
VS bit is set, Tsi148 acquires VMEbus ownership. This prevents any other
VMEbus masters from acquiring the VMEbus. Setting the VS bit also prevents
Tsi148 from starting any VMEbus cycles. This ensures that the VMEbus is in an
idle state when the LRSTO_ signal is asserted. The LRESET bit can then be set.
Setting the Local Reset
on page
Setting the Local Reset Set (LRSTS) bit in the CR/CSR Bit Set (CSRBSR)
register (see
in reset until a 1 is written to the LRSTC bit in the CSRBCR register.
253). The LRESET bit is self clearing. When the LRESET bit is set the
358). The LRSTO_ reset remains asserted as long as the LRST bit is set.
Section 10.4.102 on page
(
LRST) bit in the GCTRL register (see
5. Resets, Clocks, and Power-up Options > Resets
366). When the bit is set the board is held
Section 10.4.33 on page
(
VS) bit and wait for the VMEbus Stop
Section 10.4.34 on
Section 10.4.96
249). When the
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