STM32W108HBU61TR STMicroelectronics, STM32W108HBU61TR Datasheet - Page 98

• Manufacturer Part Number: STM32W108HBU61TR
• Description: 16/32-BITS MICROS
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32W108HBU61TR

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Applications: IEEE 802.15.4 Wireless
• Processing Unit: Microprocessor
• Operating Supply Voltage (min): 1.18V
• Operating Supply Voltage (typ): 1.25V
• Operating Supply Voltage (max): 1.32V
• Package Type: VFQFPN EP
• Pin Count: 40
• Mounting: Surface Mount
• Rad Hardened: No
• Core Processor: ARM® Cortex-M3™
• Program Memory Type: FLASH (128 kB)
• Controller Series: STM32W
• Ram Size: 8K x 8
• Interface: I²C, SPI, UART/USART
• Number Of I /o: 18
• Voltage - Supply: 1.18 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Compliant

Serial interfaces
9.9.5
Table 60.
9.10
9.11
9.11.1
Table 61.
98/220
31
15
31
15
30
14
30
14
Bits [3:0] SC_RATEEXP: The exponential component (EXP) of the clock rate in the equation:
Serial clock exponential prescaler register (SCx_RATEEXP)
Address offset: 0xC864 (SC1_RATEEXP) and 0xC064 (SC2_RATEEXP)
Reset value:
Serial clock exponential prescaler register (SCx_RATEEXP)
SPI slave mode registers
Refer to
SCx_DATA, SCx_SPICFG, and SCx_SPISTAT registers.
Inter-integrated circuit (I
I
Address offset: 0xC844 (SC1_TWISTAT) and 0xC044 (SC2_TWISTAT)
Reset value:
I
2
2
Bit 3 SC_TWICMDFIN: This bit is set when a START or STOP command completes. It clears on the
Bit 2 SC_TWIRXFIN: This bit is set when a byte is received. It clears on the next I
Bit 1 SC_TWITXFIN: This bit is set when a byte is transmitted. It clears on the next I
Bit 0 SC_TWIRXNAK: This bit is set when a NACK is received from the slave. It clears on the next
C status register (SCx_TWISTAT)
C status register (SCx_TWISTAT)
29
13
29
13
next I2C bus activity.
I
2
C bus activity.
Rate = 12 MHz / ( (LIN + 1) * (2^EXP) )
28
12
28
12
Section 9.9: SPI master mode registers on page 95
27
11
27
11
0x0000 0000
0x0000 0000
STM32W108HB, STM32W108CC, STM32W108CB and STM32W108CZ
26
10
26
10
Reserved
Reserved
25
25
9
9
Doc ID 16252 Rev 9
24
24
8
8
Reserved
Reserved
2
C) interface registers
23
23
7
7
22
22
6
6
21
21
5
5
for a description of the
20
20
4
4
WICM
SC_T
DFIN
19
19
3
3
r
WIRXF
SC_T
SC_RATEEXP
18
18
IN
2
2
2
r
C bus activity.
2
rw
C bus activity.
WITXF
SC_T
17
17
IN
1
1
r
WIRXN
SC_T
AK
16
16
0
0
r