STM32W108HBU61TR STMicroelectronics, STM32W108HBU61TR Datasheet - Page 153

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STM32W108HBU61TR

Manufacturer Part Number
STM32W108HBU61TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32W108HBU61TR

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
IEEE 802.15.4 Wireless
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.18V
Operating Supply Voltage (typ)
1.25V
Operating Supply Voltage (max)
1.32V
Package Type
VFQFPN EP
Pin Count
40
Mounting
Surface Mount
Rad Hardened
No
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
18
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Compliant

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Part Number:
STM32W108HBU61TR
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STM32W108HB, STM32W108CC, STM32W108CB and STM32W108CZ
10.3.6
Table 93.
31
15
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30
14
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TIM_IC4F
Bits [1:0] TIM_CC1S: Capture / Compare 1 Selection
TIM_OC4M
Timer x capture/compare mode register 2 (TIMx_CCMR2)
Address offset: 0xE01C (TIM1) and 0xF01C (TIM2)
Reset value:
Timer x capture/compare mode register 2 (TIMx_CCMR2)
Timer channels can be programmed as inputs (capture mode) or outputs (compare mode).
The direction of channel y is defined by TIM_CCyS in this register.
The other bits in this register have different functions in input and in output modes. The
TIM_OC* fields only apply to a channel configured as an output (TIM_CCyS = 0), and the
TIM_IC* fields only apply to a channel configured as an input (TIM_CCyS > 0).
29
13
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This configures the channel as an output or an input. If an input, it selects the input source.
00: Channel is an output.
01: Channel is an input and is mapped to TI1.
10: Channel is an input and is mapped to TI2.
11: Channel is an input and is mapped to TRGI. This requires an internal trigger input selected
by the TIM_TS bit in the TIM_SMCR register.
Note: TIM_CC1S may be written only when the channel is off (TIM_CC1E = 0 in the
28
12
rw
TIMx_CCER register).
TIM_O
C4BE
TIM_IC4PSC
27
11
rw
0x0000 0000
TIM_O
C4FE
26
10
rw
25
TIM_CC4S
9
Doc ID 16252 Rev 9
rw
24
8
Reserved
23
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7
22
rw
6
TIM_IC3F
TIM_OC3M
21
rw
5
20
rw
4
General-purpose timers
TIM_O
C3BE
TIM_IC3PSC
19
rw
3
TIM_O
C3FE
18
rw
2
17
TIM_CC3S
1
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16
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