STM32W108HBU61TR STMicroelectronics, STM32W108HBU61TR Datasheet - Page 101

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STM32W108HBU61TR

Manufacturer Part Number
STM32W108HBU61TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32W108HBU61TR

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
IEEE 802.15.4 Wireless
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.18V
Operating Supply Voltage (typ)
1.25V
Operating Supply Voltage (max)
1.32V
Package Type
VFQFPN EP
Pin Count
40
Mounting
Surface Mount
Rad Hardened
No
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
18
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Compliant

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Part Number:
STM32W108HBU61TR
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0
STM32W108HB, STM32W108CC, STM32W108CB and STM32W108CZ
9.12.2
Table 65.
31
15
30
14
UART configuration register (SC1_UARTCFG)
Address offset: 0xC85C
Reset value:
UART configuration register (SC1_UARTCFG)
Bit 6 SC_UARTAUTO: Set this bit to enable automatic nRTS control by hardware (SC_UARTFLOW
Bit 5 SC_UARTFLOW: Set this bit to enable using nRTS/nCTS flow control signals. Clear this bit to
Bit 4 SC_UARTODD: If parity is enabled, specifies the kind of parity.
Bit 3 SC_UARTPAR: Specifies whether to use parity bits.
Bit 2 SC_UART2STP: Number of stop bits transmitted.
Bit 1 SC_UART8BIT: Number of data bits.
Bit 0 SC_UARTRTS: nRTS is an output to control the flow of serial data sent to the STM32W108
29
13
must also be set). When automatic control is enabled, nRTS will be deasserted when the
receive FIFO has space for only one more byte (inhibits transmission from the other device)
and will be asserted if it has space for more than one byte (enables transmission from the other
device). The SC_UARTRTS bit in this register has no effect if this bit is set.
disable the signals. When this bit is clear, the UART transmitter will not be inhibited by nCTS.
0: Even parity.
0: Don't use parity.
0: 1 stop bit.
0: 7 data bits.
from another device. This bit directly controls the output at the nRTS pin (SC_UARTFLOW must
be set and SC_UARTAUTO must be cleared). When this bit is set, nRTS is asserted (pin is low,
'XON', RS232 positive voltage); the other device's transmission is enabled. When this bit is
cleared, nRTS is deasserted (pin is high, 'XOFF', RS232 negative voltage), the other device's
transmission is inhibited.
28
12
Reserved
27
11
0x0000 0000
26
10
25
9
1: Odd parity.
1: Use parity.
1: 2 stop bits.
1: 8 data bits.
Doc ID 16252 Rev 9
24
8
Reserved
23
7
SC_UA
RTAUT
22
rw
O
6
SC_UA
RTFLO
21
rw
W
5
ARTO
SC_U
DD
20
rw
4
SC_UA
RTPAR
19
rw
3
SC_UA
RT2ST
Serial interfaces
18
rw
P
2
SC_UA
RT8BI
17
rw
1
T
101/220
SC_UA
RTRTS
16
rw
0

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