STM32W108HBU61TR STMicroelectronics, STM32W108HBU61TR Datasheet - Page 201

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STM32W108HBU61TR

Manufacturer Part Number
STM32W108HBU61TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32W108HBU61TR

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
IEEE 802.15.4 Wireless
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.18V
Operating Supply Voltage (typ)
1.25V
Operating Supply Voltage (max)
1.32V
Package Type
VFQFPN EP
Pin Count
40
Mounting
Surface Mount
Rad Hardened
No
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
18
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32W108HBU61TR
Manufacturer:
ST
0
STM32W108HB, STM32W108CC, STM32W108CB and STM32W108CZ
Note:
Table 145
Table
Table 145. ADC characteristics
The signal-ended ADC measurements are limited in their range and only guaranteed for
accuracy within the limits shown in this table. The ADC's internal design allows for
measurements outside of this range (±200 mV) when the input buffer is disabled, but the
accuracy of such measurements is not guaranteed. The maximum input voltage is of more
interest to the differential sampling where a differential measurement might be small, but a
common mode can push the actual input voltage on one of the signals towards the upper
voltage limit.
VREF
VREF output current
VREF load capacitance
External VREF voltage range
External VREF input impedance
Minimum input voltage
Maximum input voltage
Single-ended signal range
Differential signal range
Common mode range
Input referred ADC offset
Input Impedance
Input buffer disabled
Input buffer enabled
Input buffer disabled
Input buffer enabled
Input buffer disabled
Input buffer enabled
Input buffer disabled
Input buffer enabled
Input buffer disabled
Input buffer enabled
1 MHz sample clock
6 MHz sample clock
Not sampling
144.
lists other specifications for the ADC not covered in
Parameter
Doc ID 16252 Rev 9
-VDD_PADS + 0.1
-VREF
Min.
1.17
1.1
0.1
0.1
-10
0.5
10
1
0
0
0
1
VDD_PADS/2
Typ.
1.2
1.2
Table
Electrical characteristics
+VDD_PADS - 0.1
VDD_PADS – 0.1
142,
VDD_PADS - 0.1
+VREF
Table
VREF
VREF
VREF
Max.
1.23
1.3
10
10
1
143, and
201/220
Units
mV
mA
nF
V
V
V
V
V
V
V

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