STM32W108HBU61TR STMicroelectronics, STM32W108HBU61TR Datasheet - Page 48

• Manufacturer Part Number: STM32W108HBU61TR
• Description: 16/32-BITS MICROS
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32W108HBU61TR

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Applications: IEEE 802.15.4 Wireless
• Processing Unit: Microprocessor
• Operating Supply Voltage (min): 1.18V
• Operating Supply Voltage (typ): 1.25V
• Operating Supply Voltage (max): 1.32V
• Package Type: VFQFPN EP
• Pin Count: 40
• Mounting: Surface Mount
• Rad Hardened: No
• Core Processor: ARM® Cortex-M3™
• Program Memory Type: FLASH (128 kB)
• Controller Series: STM32W
• Ram Size: 8K x 8
• Interface: I²C, SPI, UART/USART
• Number Of I /o: 18
• Voltage - Supply: 1.18 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Compliant

System modules
Table 15.
Table 16.
48/220
31
15
31
15
30
14
30
14
Bits [15:0] SLEEPTMR_CMPAH_FIELD:
Bits [15:0] SLEEPTMR_CMPAL_FIELD:
Sleep timer compare A low register (SLEEPTMR_CMPAL)
Address:
Reset value:
Sleep timer compare A low register (SLEEPTMR_CMPAL)
Sleep timer compare B high register (SLEEPTMR_CMPBH)
Address:
Reset value:
Sleep timer compare B high register (SLEEPTMR_CMPBH)
29
13
29
13
Sleep timer compare A high value [31:16].
Sleep timer compare value, writing updates COMP_A_H (directly) and COMP_A_L (from
hold register).
Can only be changed when the ENABLE bit (bit 11 of SLEEP_CONFIG register) is set to ‘0’.
If changed when the ENABLE bit is set to ‘1’, a spurious interrupt may be generated.
Therefore it is recommended to disable interrupts before changing this register.
Sleep timer compare A low value [15:0].
Writing to this register puts value in hold register until a write to the SLEEPTMR_CMPAH
register.
Can only be changed when the ENABLE bit (bit 11 of SLEEP_CONFIG register) is set to ‘0’.
If changed when the ENABLE bit is set to ‘1’, a spurious interrupt may be generated.
Therefore it is recommended to disable interrupts before changing this register.
28
12
28
12
27
11
27
11
0x4000 601C
0x0000 FFFF
0x4000 6020
0x0000 FFFF
STM32W108HB, STM32W108CC, STM32W108CB and STM32W108CZ
26
10
26
10
25
25
9
9
Doc ID 16252 Rev 9
SLEEPTMR_CMPBH
SLEEPTMR_CMPAL
24
24
8
8
Reserved
Reserved
rw
rw
23
23
7
7
22
22
6
6
21
21
5
5
20
20
4
4
19
19
3
3
18
18
2
2
17
17
1
1
16
16
0
0