STM32W108HBU61TR STMicroelectronics, STM32W108HBU61TR Datasheet - Page 118

• Manufacturer Part Number: STM32W108HBU61TR
• Description: 16/32-BITS MICROS
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32W108HBU61TR

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Applications: IEEE 802.15.4 Wireless
• Processing Unit: Microprocessor
• Operating Supply Voltage (min): 1.18V
• Operating Supply Voltage (typ): 1.25V
• Operating Supply Voltage (max): 1.32V
• Package Type: VFQFPN EP
• Pin Count: 40
• Mounting: Surface Mount
• Rad Hardened: No
• Core Processor: ARM® Cortex-M3™
• Program Memory Type: FLASH (128 kB)
• Controller Series: STM32W
• Ram Size: 8K x 8
• Interface: I²C, SPI, UART/USART
• Number Of I /o: 18
• Voltage - Supply: 1.18 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Compliant

General-purpose timers
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reload value, whereas the prescalar's counter restarts from 0, but the prescale rate doesn't
change.
In addition, if the TIM_URS bit in the TIMx_CR1 register is set, setting the TIM_UG bit
generates an update event, but without setting the INT_TIMUIF flag. Thus no interrupt
request is sent. This avoids generating both update and capture interrupts when clearing the
counter on the capture event.
When an update event occurs, the update flag (the INT_TIMUIF bit in the INT_TIMxFLAG
register) is set (unless TIM_USR is 1) and the following registers are updated:
●
●
Figure 21
frequencies when TIMx_ARR = 0x36.
Figure 21. Counter timing diagram, internal clock divided by 1
Figure 22. Counter timing diagram, internal clock divided by 4
Center-aligned mode (up/down counting)
In center-aligned mode, the counter counts from 0 to the auto-reload value (contents of the
TIMx_ARR register) - 1 and generates a counter overflow event, then counts from the
The prescaler shadow register is reloaded with the buffer value (contents of the
TIMx_PSC register).
The auto-reload active register is updated with the buffer value (contents of the
TIMx_ARR register). The auto-reload is updated before the counter is reloaded, so that
the next period is the expected one.
and
Figure 22
STM32W108HB, STM32W108CC, STM32W108CB and STM32W108CZ
show some examples of the counter behavior for different clock
Doc ID 16252 Rev 9