Z84C0010PEG Zilog, Z84C0010PEG Datasheet - Page 99

• Manufacturer Part Number: Z84C0010PEG
• Description: IC 10MHZ Z80 CMOS CPU 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z84C0010PEG

• Processor Type: Z80
• Features: Enhanced Z80 Microprocessor/CPU
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +100°C
• Svhc: No SVHC (18-Jun-2010)
• Operating Temperature Max: 100°C
• Rohs Compliant: Yes
• Processor Series: Z84C0xx
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Base Number: 84
• Clock Frequency: 10MHz
• Frequency Typ: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3898; Z84C0010PEG

UM008005-0205
Byte Count Register (
decrements to
During
of the interrupt enable flip-flop (
When inputting a byte from an I/O device with an
the P/V Flag is adjusted to indicate the data parity.
Half Carry Flag
The Half-Carry Flag (H) is set (
and Borrow status between Bits 3 and 4 of an 8-bit arithmetic operation.
This flag is used by the
(
H Flag is set (
Zero Flag
The Zero Flag (Z) is set (1) or cleared (0) if the result generated by the
execution of certain instructions is 0.
For 8-bit arithmetic and logical operations, the Z flag is set to a
resulting byte in the Accumulator is
reset to
For compare (Search) instructions, the Z flag is set to
Accumulator is equal to the value in the memory location indicated by the
value of the Register pair HL.
When testing a bit in a register or memory location, the Z flag contains the
complemented state of the indicated bit (see “Bit b, s”).
H Flag Add
1
0
DAA
) to correct the result of a packed BCD add or subtract operation. The
LD A, I
0
A Carry occurs from Bit 3 to Bit 4 A Borrow from Bit 4 occurs
No Carry occurs from Bit 3 to Bit 4 No Borrow from Bit 4 occurs
.
1
0
) or cleared (
, the flag is cleared to
and
LD A, R
BC
Decimal Adjust Accumulator
). When decrementing, if the byte counter
0
instructions, the P/V Flag is set with the value
) according to the following table:
1
IFF2
) or cleared (
0
0
) for storage or testing.
. If the byte is not
, otherwise the flag is set to
Subtract
0
) depending on the Carry
IN r
1
if the value in the
Z80 Instruction Set
, (
User’s Manual
0
C
, the Z flag is
instruction
), instruction,
Z80 CPU
1
1
if the
.
79