Z84C0010PEG Zilog, Z84C0010PEG Datasheet - Page 90

IC 10MHZ Z80 CMOS CPU 40-DIP

Z84C0010PEG

Manufacturer Part Number
Z84C0010PEG
Description
IC 10MHZ Z80 CMOS CPU 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheets

Specifications of Z84C0010PEG

Processor Type
Z80
Features
Enhanced Z80 Microprocessor/CPU
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Core Size
8bit
Cpu Speed
10MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Operating Temperature Range
-40°C To +100°C
Svhc
No SVHC (18-Jun-2010)
Operating Temperature Max
100°C
Rohs Compliant
Yes
Processor Series
Z84C0xx
Core
Z80
Data Bus Width
8 bit
Program Memory Size
64 KB
Maximum Clock Frequency
10 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Base Number
84
Clock Frequency
10MHz
Frequency Typ
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3898
Z84C0010PEG

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70
UM008005-0205
Z80 CPU
User’s Manual
Table 17 lists the eight Op Codes for the restart instruction. This
instruction is a single byte call to any of the eight addresses listed. The
simple mnemonic for these eight calls is also listed. This instruction is
useful for frequently-used routines because memory consumption is
minimized.
Table 17. Restart Group
Input/Output
The Z80 has an extensive set of input and output instructions as shown in
Table 18 and Table 19. The addressing of the input or output device can
be either absolute or register indirect, using the C register. In the register
indirect addressing mode, data can be transferred between the I/O devices
and any of the internal registers. In addition, eight block transfer
instructions have been implemented. These instructions are similar to the
memory block transfers except that they use register pair HL for a pointer
to the memory source (output commands) or destination (input
commands) while register B is used as a byte counter. Register C holds
the address of the port for which the input or output command is required.
Because register B is eight bits in length, the I/O block transfer command
handles up to 256 bytes.
In the instructions
the lower half of the address bus (A7-A0) while the accumulator content
CALL Address
0000H
0008H
0010H
0018H
0020H
0028H
0030H
0038H
IN A
Op
Code
C7
CF
D7
DF
E7
EF
F7
FF
, and
OUT n
RST 0
RST 8
RST 16
RST 24
RST 32
RST 40
RST 48
RST 56
,
A
, the I/O device address n appears in
Z80 CPU Instruction Description

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