Z84C0010PEG Zilog, Z84C0010PEG Datasheet - Page 305

• Manufacturer Part Number: Z84C0010PEG
• Description: IC 10MHZ Z80 CMOS CPU 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z84C0010PEG

• Processor Type: Z80
• Features: Enhanced Z80 Microprocessor/CPU
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +100°C
• Svhc: No SVHC (18-Jun-2010)
• Operating Temperature Max: 100°C
• Rohs Compliant: Yes
• Processor Series: Z84C0xx
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Base Number: 84
• Clock Frequency: 10MHz
• Frequency Typ: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3898; Z84C0010PEG

Operation:
Op Code:
Description: The contents of the HL register pair are placed on the address bus to select a
Condition Bits Affected:
Example:
UM008005-0205
(C) ← (HL), B ← B -1, HL ← HL -1
OUTD
location in memory. The byte contained in this memory location is
temporarily stored in the CPU. Then, after the byte counter (B) is
decremented, the contents of register C are placed on the bottom half (A0
through A7) of the address bus to select the I/O device at one of 256
possible ports. Register B may be used as a byte counter, and its
decremented value is placed on the top half (A8 through A15) of the
address bus at this time. Next, the byte to be output is placed on the data bus
and written to the selected peripheral device. Finally, the register pair HL is
decremented.
S is unknown
Z is set if B–1 = 0; reset otherwise
H is unknown
P/V is unknown
N is set
C is not affected
If the contents of register C are
contents of the HL register pair are
location
HL register pair contains
device mapped to I/O port address
1
1
1
0
M Cycles
1000H
1
1
4
are
0
0
59H
1
1
, at execution of
OUTD
0FFFH
16 (4, 5, 3. 4)
1
0
T States
07H
0
1
, and byte
07H
1000H
, the contents of register B are
1
1
.
OUTD
ED
AB
, and the contents of memory
59H
4 MHz E.T.
register B contains
is written to the peripheral
4.00
Z80 Instruction Set
User’s Manual
Z80 CPU
10H
0FH
, the
, the
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