Z84C0010PEG Zilog, Z84C0010PEG Datasheet - Page 67

• Manufacturer Part Number: Z84C0010PEG
• Description: IC 10MHZ Z80 CMOS CPU 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z84C0010PEG

• Processor Type: Z80
• Features: Enhanced Z80 Microprocessor/CPU
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Operating Temperature Range: -40°C To +100°C
• Svhc: No SVHC (18-Jun-2010)
• Operating Temperature Max: 100°C
• Rohs Compliant: Yes
• Processor Series: Z84C0xx
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Base Number: 84
• Clock Frequency: 10MHz
• Frequency Typ: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3898; Z84C0010PEG

Z80 CPU
User’s Manual
47
The displacement is a signed two’s complement number. Indexed
addressing greatly simplifies programs using tables of data because the
index register can point to the start of any table. Two index registers are
provided because very often operations require two or more tables.
Indexed addressing also allows for relocatable code.
The two index registers in the Z80 are referred to as IX and IY. To
indicate indexed addressing the notation use:
(IX+d) or (IY+d)
Here d is the displacement specified after the Op Code. The parentheses
indicate that this value is used as a pointer to external memory.
Register Addressing
Many of the Z80 Op Codes contain bits of information that specify which
CPU register is to be used for an operation. An example of register
addressing is to load the data in register 6 into register C.
Implied Addressing
Implied addressing refers to operations where the Op Code automatically
implies one or more CPU registers as containing the operands. An
example is the set of arithmetic operations where the accumulator is
always implied to be the destination of the results.
Register Indirect Addressing
This type of addressing specifies a 16-bit CPU register pair (such as HL)
to be used as a pointer to any location in memory. This type of instruction
is very powerful and it is used in a wide range of applications.
Op Code
One or Two Bytes
An example of this type of instruction is to load the accumulator with the
data in the memory location pointed to by the HL register contents.
Indexed addressing is actually a form of register indirect addressing
UM008005-0205
Z80 CPU Instruction Description