Z84C0010PEG Zilog, Z84C0010PEG Datasheet - Page 157

IC 10MHZ Z80 CMOS CPU 40-DIP

Z84C0010PEG

Manufacturer Part Number
Z84C0010PEG
Description
IC 10MHZ Z80 CMOS CPU 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheets

Specifications of Z84C0010PEG

Processor Type
Z80
Features
Enhanced Z80 Microprocessor/CPU
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Core Size
8bit
Cpu Speed
10MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Operating Temperature Range
-40°C To +100°C
Svhc
No SVHC (18-Jun-2010)
Operating Temperature Max
100°C
Rohs Compliant
Yes
Processor Series
Z84C0xx
Core
Z80
Data Bus Width
8 bit
Program Memory Size
64 KB
Maximum Clock Frequency
10 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Base Number
84
Clock Frequency
10MHz
Frequency Typ
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3898
Z84C0010PEG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z84C0010PEG
Manufacturer:
Zilog
Quantity:
110
Part Number:
Z84C0010PEG
Manufacturer:
Zilog
Quantity:
203
Part Number:
Z84C0010PEG
Manufacturer:
ZILOG
Quantity:
20 000
Operation:
Op Code:
Operands:
Description: The contents of the memory location addressed by the HL register pair is
Condition Bits Affected:
Example:
UM008005-0205
A -(HL), HL ← HL -1, BC ← BC -1
CPD
compared with the contents of the Accumulator. In case of a true
compare, a condition bit is set. The HL and Byte Counter (register pair
BC) are decremented.
S is set if result is negative; reset otherwise
Z is set if A equals (HL); reset otherwise
H is set if borrow from bit 4; reset otherwise
P/V is set if BC -1 x 0; reset otherwise
N is set
C is not affected
If the HL register pair contains
3BH
At execution of
pair contains
register resets. There is no effect on the contents of the Accumulator or
address
1
1
, the Accumulator contains
1
0
1111H
M Cycles
1
1
4
1110H
.
CPD
0
0
, the flag in the F register sets, and the P/V flag in the F
1
1
the Byte Counter contains
CPD
16 (4, 4, 3, 5)
1
0
T States
1111H
3BH
0
0
, and the Byte Counter contains
1
1
, memory location
ED
A9
4 MHz E.T.
0000H
4.00
Z80 Instruction Set
, the HL register
User’s Manual
1111H
Z80 CPU
contains
0001H
.
137

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