Z84C0010PEG Zilog, Z84C0010PEG Datasheet - Page 63

IC 10MHZ Z80 CMOS CPU 40-DIP

Z84C0010PEG

Manufacturer Part Number
Z84C0010PEG
Description
IC 10MHZ Z80 CMOS CPU 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheets

Specifications of Z84C0010PEG

Processor Type
Z80
Features
Enhanced Z80 Microprocessor/CPU
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Core Size
8bit
Cpu Speed
10MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Operating Temperature Range
-40°C To +100°C
Svhc
No SVHC (18-Jun-2010)
Operating Temperature Max
100°C
Rohs Compliant
Yes
Processor Series
Z84C0xx
Core
Z80
Data Bus Width
8 bit
Program Memory Size
64 KB
Maximum Clock Frequency
10 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Base Number
84
Clock Frequency
10MHz
Frequency Typ
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3898
Z84C0010PEG

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Part Number
Manufacturer
Quantity
Price
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Z80 CPU
User’s Manual
43
the 8-bit Op Code. This is possible because only eight separate addresses
located in page zero of the external memory may be specified. Program
jumps may also be achieved by loading register HL, IX, or IY directly
into the PC, thus allowing the jump address to be a complex function of
the routine being executed.
The input/output group of instructions in the Z80 allow for a wide range
of transfers between external memory locations or the general-purpose
CPU registers, and the external I/O devices. In each case, the port number
is provided on the lower eight bits of the address bus during any I/O
transaction. One instruction allows this port number to be specified by the
second byte of the instruction while other Z80 instructions allow it to be
specified as the content of the C register. One major advantage of using
the C register as a pointer to the I/O device is that it allows multiple I/O
ports to share common software driver routines. This advantage is not
possible when the address is part of the Op Code if the routines are stored
in ROM. Another feature of these input instructions is the automatic
setting of the flag register, making additional operations unnecessary to
determine the state of the input data. The parity state is one example.
The Z80 CPU includes single instructions that can move blocks of data
(up to 256 bytes) automatically to or from any I/O port directly to any
memory location. In conjunction with the dual set of general-purpose
registers, these instructions provide fast I/O block transfer rates. The
power of this I/O instruction set is demonstrated by the Z80 CPU
providing all required floppy disk formatting on double-density floppy
disk drives on an interrupt-driven basis. For example, the CPU provides
the preamble, address, data, and enables the CRC codes.
Finally, the basic CPU control instructions allow various options and
modes. This group includes instructions such as setting or resetting the
interrupt enable flip-flop or setting the mode of interrupt response.
UM008005-0205
Z80 CPU Instruction Description

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