EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 45
EP3SL150F1152C2N
Manufacturer Part Number
EP3SL150F1152C2N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C2N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2409
EP3SL150F1152C2NES
EP3SL150F1152C2NES
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
EP3SL150F1152C2N
Manufacturer:
ALTERA
Quantity:
20 000
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Introduction
Logic Array Blocks
© February 2009 Altera Corporation
SIII51002-1.5
This chapter describes the features of the logic array block (LAB) in the Stratix
core fabric. The logic array block is composed of basic building blocks known as
adaptive logic modules (ALMs) that can be configured to implement logic functions,
arithmetic functions, and register functions.
Each LAB consists of ten ALMs, carry chains, shared arithmetic chains, LAB control
signals, local interconnect, and register chain connection lines. The local interconnect
transfers signals between ALMs in the same LAB. The direct link interconnect allows
a LAB to drive into the local interconnect of its left and right neighbors. Register chain
connections transfer the output of the ALM register to the adjacent ALM register in an
LAB. The Quartus
allowing the use of local, shared arithmetic chain, and register chain connections for
performance and area efficiency.
the LAB interconnects.
®
2. Logic Array Blocks and Adaptive Logic
II Compiler places associated logic in an LAB or adjacent LABs,
Figure 2–1
Modules in Stratix III Devices
shows the Stratix III LAB structure and
Stratix III Device Handbook, Volume 1
®
III
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