EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 267
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C2N
Manufacturer Part Number
EP3SL150F1152C2N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C2N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2409
EP3SL150F1152C2NES
EP3SL150F1152C2NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3SL150F1152C2N
Manufacturer:
ALTERA
Quantity:
20 000
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Chapter 8: External Memory Interfaces in Stratix III Devices
Stratix III External Memory Interface Features
DQS Phase-Shift Circuitry
© March 2010 Altera Corporation
1
1
When using the Altera memory controller MegaCore
instantiated for you.
The ALTMEMPHY megafunction and the Altera memory controller MegaCore
functions can run at half the frequency of the I/O interface of the memory devices to
allow better timing management in high-speed memory interfaces. Stratix III devices
have built-in registers to convert data from full-rate (I/O frequency) to half-rate
(controller frequency) and vice versa. You can bypass these registers if your memory
controller is not running at half the rate of the I/O frequency.
Stratix III phase-shift circuitry provides phase shift to the DQS and CQn pins on read
transactions, when the DQS/CQ and CQn pins are acting as input clocks or strobes to
the FPGA. DQS phase-shift circuitry consists of DLLs that are shared between
multiple DQS pins and the phase-offset module to further fine-tune the DQS phase
shift for different sides of the device.
circuitry is connected to the DQS/CQ and CQn pins in the device.
Figure 8–10
shows how the DQS phase-shift
®
functions, the PHY is
Stratix III Device Handbook, Volume 1
8–19
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