EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 239

• Manufacturer Part Number: EP3SL150F1152C2N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C2N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2409; EP3SL150F1152C2NES

Chapter 7: Stratix III Device I/O Features
Termination Schemes for I/O Standards
Figure 7–22. Differential SSTL I/O Standard Termination for Stratix III Devices
Figure 7–23. Differential HSTL I/O Standard Termination for Stratix III Devices
© July 2010
Termination
External
On-Board
Termination
Termination
OCT
External
On-Board
Termination
OCT
Altera Corporation
Differential SSTL Class I
Series OCT
Differential HSTL Class I
Series OCT
Transmitter
Transmitter
Transmitter
Transmitter
50
50 Ω
Differential HSTL Class I
25
25
Differential SSTL Class I
50 Ω
50 Ω
Z
Z
50
50
0
Z
0
Z
= 50
50 Ω
= 50
0
50
0
= 50 Ω
= 50 Ω
V TT V TT
V TT V TT
V CCIO
50 Ω
V CCIO
50
100
GND
100
GND
100 Ω
100 Ω
100
100
100 Ω
100 Ω
V CCIO
Receiver
V CCIO
Receiver
Receiver
GND
Receiver
GND
Series OCT
Differential SSTL Class II
Differential HSTL Class II
Series OCT
Transmitter
Transmitter
Transmitter
Transmitter
25
25 Ω
50
Differential HSTL Class II
50 Ω
25
25
V TT
V TT
V TT V TT
V TT
Differential SSTL Class II
V TT
V TT V TT
50 Ω
50 Ω
50
50
Z
Z
Z
Z
0
0
= 50 Ω
0
0
= 50 Ω
50
= 50
= 50
50 Ω
50
50
50 Ω
50 Ω
Stratix III Device Handbook, Volume 1
50
50 Ω
V CCIO
V CCIO
V TT V TT
V TT V TT
100 Ω
GND
100 Ω
100
GND
100
100 Ω
100 Ω
100
100
50
50 Ω
V CCIO
V CCIO
Receiver
Receiver
GND
GND
Receiver
Receiver
7–35