EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 407

• Manufacturer Part Number: EP3SL150F1152C2N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C2N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2409; EP3SL150F1152C2NES

Chapter 13: IEEE 1149.1 (JTAG) Boundary-Scan Testing in Stratix III Devices
IEEE Std. 1149.1 BST Operation Control
Figure 13–6. IEEE Std. 1149.1 Timing Waveforms
Figure 13–7. Selecting the Instruction Mode
© July 2010
Altera Corporation
TAP_STATE
TEST_LOGIC/RESET
TMS
TDO
TCK
TDI
TMS
To start IEEE Std. 1149.1 operation, select an instruction mode by advancing the TAP
controller to the shift instruction register (SHIFT_IR) state and shift in the
appropriate instruction code on the TDI pin. The waveform diagram in
shows the entry of the instruction code into the instruction register. It also shows the
values of TCK, TMS, TDI, TDO, and the states of the TAP controller. From the RESET
state, TMS is clocked with the pattern 01100 to advance the TAP controller to
SHIFT_IR.
The TDO pin is tri-stated in all states except in the SHIFT_IR and SHIFT_DR states.
The TDO pin is activated at the first falling edge of TCK after entering either of the shift
states and is tri-stated at the first falling edge of TCK after leaving either of the shift
states.
When the SHIFT_IR state is activated, TDO is no longer tri-stated, and the initial state
of the instruction register is shifted out on the falling edge of TCK. TDO continues to
shift out the contents of the instruction register as long as the SHIFT_IR state is
active. The TAP controller remains in the SHIFT_IR state as long as TMS remains low.
TDI
TDO
TCK
RUN_TEST/IDLE
t
JCH
SELECT_DR_SCAN
t
JPZX
t
JCP
SELECT_IR_SCAN
t
JCL
t
JPCO
CAPTURE_IR
t
JPSU
SHIFT_IR
t
JPH
t
JPXZ
Stratix III Device Handbook, Volume 1
EXIT1_IR
Figure 13–7
13–9