EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 214
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C2N
Manufacturer Part Number
EP3SL150F1152C2N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C2N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2409
EP3SL150F1152C2NES
EP3SL150F1152C2NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3SL150F1152C2N
Manufacturer:
ALTERA
Quantity:
20 000
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7–10
Figure 7–4. Number of I/Os in Each Bank in the 1152-pin FineLine BGA Package
Notes to
(1) All I/O pin counts include dedicated clock inputs pins. The pin count includes all general purpose I/O, dedicated clock pins, and dual-purpose
(2)
(3) Number of I/Os in Each Bank in EP3SL110, EP3SL150, EP3SL200, EP3SE80, EP3SE110, and EP3SE260 Devices in the 1152-pin FineLine BGA
(4) Number of I/Os in Each Bank in EP3SL340 in the 1152-pin Hybrid FineLine BGA package.
Stratix III Device Handbook, Volume 1
configuration pins. Dedicated configuration pins are not included in the pin count.
Figure 7–4
package.
Figure
is a top view of the silicon die that corresponds to a reverse view for flip chip packages. It is a graphical representation only.
7–4:
Number
of I/Os
48
48
42
42
Name
Bank 1A
Bank 2A
Bank
Bank 1C
Bank 2C
EP3SE110
EP3SE260
EP3SL110
EP3SL150
EP3SL200
EP3SL340
EP3SE80
(Note
Bank 6C
Bank 5C
Bank 5A
Bank 6A
Name
Bank
1), (2), (3),
Chapter 7: Stratix III Device I/O Features
Number
of I/Os
48
42
42
48
© July 2010 Altera Corporation
(4)
Stratix III I/O Banks
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