DS3170 Maxim Integrated Products, DS3170 Datasheet - Page 79

• Manufacturer Part Number: DS3170
• Description: Network Controller & Processor ICs DS3-E3 Single-Chip T ransceiver T3-E3 Fra
• Manufacturer: Maxim Integrated Products

10.6 DS3/E3 Framer / Formatter
10.6.1 General Description
The Receive DS3/E3 Framer receives a unipolar DS3/E3 signal, determines frame alignment and extracts the
DS3/E3 overhead in the receive direction. The Transmit DS3/E3 Formatter receives a DS3/E3 payload, generates
framing, inserts DS3/E3 overhead, and outputs a unipolar DS3/E3 signal in the transmit direction.
The Receive DS3/E3 Framer receives a DS3/E3 signal from the Receive LIU or RDAT (or RPOS and RNEG),
determines the frame alignment, extracts the DS3/E3 overhead, and outputs the payload with frame and overhead
The Transmit DS3/E3 Formatter receives a DS3/E3 payload on TSER, generates a DS3/E3 frame, optionally
inserts DS3/E3 overhead, and transmits the DS3/E3 signal.
Refer to
Figure 10-12. Framer Detailed Block Diagram
10.6.2 Features
10.6.2.1 Transmit Formatter
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10.6.2.2 Receive Framer
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Programmable DS3 or E3 formatter – Accepts a DS3 (M23 or C-bit) or E3 (G.751 or G.832) signal and
performs DS3/E3 overhead generation.
Arbitrary framing format support – Generates a signal with an arbitrary framing format. The line
overhead/stuff periods are added into the data stream using an overhead mask signal.
Generates alarms and errors – DS3 alarm conditions (AIS, RDI, and Idle) and errors (framing, parity, and
FEBE), or E3 alarm conditions (AIS and RDI/RAI) and errors (framing, parity, and REI) can be inserted into the
outgoing data stream.
Externally controlled serial DS3/E3 overhead insertion port – Can insert all DS3 or E3 overhead via a
serial interface. DS3/E3 overhead insertion is fully controlled via the serial overhead interface.
HDLC overhead insertion – An HDLC channel can be inserted into the DS3 or E3 data stream.
FEAC insertion – A FEAC channel can be inserted into the DS3 or E3 data stream.
Trail Trace insertion – Inputs and inserts the G.832 E3 TR byte.
Programmable DS3 or E3 framer – Accepts a DS3 (M23 or C-bit) or E3 (G.751 or G.832) signal and performs
DS3/E3 overhead termination.
Clock Rate
Receive
Transmit
DS3/E3
DS3/E3
Adapter
LIU
LIU
Figure 10-12
for the location of the DS3/E3 Framer/Formatter blocks in the DS3170.
Decoder
Encoder
HDB3
B3ZS/
B3ZS/
HDB3
TUA1
TAIS
IEEE P1149.1
Access Port
JTAG Test
FEAC
DS3 / E3
DS3 / E3
Receive
Framer
Transmit
Formatter
Buffer
Trace
Trail
79 of 230
HDLC
GEN
UA1
DS3170 DS3/E3 Single-Chip Transceiver
RX BERT
TX BERT
Microprocessor
Interface