DS3170 Maxim Integrated Products, DS3170 Datasheet - Page 39

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DS3170

Manufacturer Part Number
DS3170
Description
Network Controller & Processor ICs DS3-E3 Single-Chip T ransceiver T3-E3 Fra
Manufacturer
Maxim Integrated Products
Datasheet

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Figure 8-4. Rx Line IO HDB3 Functional Timing Diagram
8.3.1.3
The TDAT pin is available when the line interface is in the UNI mode and the transmit line pins are enabled
The TDAT signal changes a small delay after the positive edge of the reference clock signal if the clock pin is not
inverted, other wise they change after the negative edge. The TLCLK clock pin is the clock reference typically
used for the TDAT signal, but the TDAT can be time referenced to the TCLKI, TCLKO, RLCLK or RCLKO clock
pins. The TDAT pin can be inverted. Please refer to
Figure 8-5. Tx Line IO UNI Functional Timing Diagram
8.3.1.4
The RDAT pin is available when the line interface is in the UNI mode. The RLCV pin is available when the line
interface is in the UNI Mode.
All bits on the RDAT pin, will come out the RSER pin, if the RSER pin is enabled.
The signal on the RLCV pin enables the BPV counter, which is in the line interface, to increment each clock it is
high.
The RDAT and RLCV signals are sampled at the rising edge of the reference clock signal if the clock pin is not
inverted, otherwise they are sampled at the negative edge. The RLCLK clock pin is the clock reference used for the
RDAT and RLCV signals. The RDAT and RLCV pins can be inverted. Please refer to
(RX DATA)
(RX LINE)
TLCLK
TDAT
RLCLK
RPOS
RNEG
RXN
RXP
UNI Mode Transmit Pin Functional Timing
UNI Mode Receive Pin Functional Timing
0 V
BIAS V
+
-
B
B
B
B
39 of 230
Figure 8-5
V
V
V
V
HDB3 CODEWORD
.
DS3170 DS3/E3 Single-Chip Transceiver
Figure 8-6
.

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