DS3170 Maxim Integrated Products, DS3170 Datasheet - Page 163

• Manufacturer Part Number: DS3170
• Description: Network Controller & Processor ICs DS3-E3 Single-Chip T ransceiver T3-E3 Fra
• Manufacturer: Maxim Integrated Products

12.7 FEAC Controller
12.7.1 FEAC Transmit Side Register Map
The transmit side utilizes five registers.
Table 12-18. FEAC Transmit Side Register Map
12.7.1.1 Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 2: Transmit FEAC Codeword Load (TFCL) – A 0 to 1 transition on this bit loads the transmit FEAC processor
mode select bits (TFS[1:0]), and transmit FEAC codes (TFCA[5:0] and TFCB[5:0]). Note: Whenever a FEAC
codeword is loaded, any current FEAC codeword transmission in progress will be immediately halted, and the new
FEAC codeword transmission will be started based on the new values for TFS[1:0], TFCA[5:0], and TFCB[5:0]..
Bits 1 to 0: Transmit FEAC Codeword Select (TFS[1:0]) – These two bits control the transmit FEAC processor
mode. The TFCL bit loads the mode set by this bit.
Address
0CCh
0CAh
0CEh
0C0h
0C2h
0C4h
0C6h
0C8h
00 = Idle (all ones)
01 = single code (send code TFCA ten times and send all ones)
10 = dual code (send code TFCA ten times, send code TFCB ten times, and send all ones)
11 = continuous code (send code TFCA continuously)
15
FEAC.TCR
FEAC.TFDR
FEAC.TSR
FEAC.TSRL
FEAC.TSRIE
--
--
0
7
0
Register
--
--
--
14
--
--
0
6
0
FEAC.TCR
FEAC Transmit Control Register
0C0h
FEAC Transmit Control Register
FEAC Transmit Data Register
FEAC Transmit Status Register
FEAC Transmit Status Register Latched
FEAC Transmit Status Register Interrupt Enable
Unused
Unused
Unused
Register Description
13
--
--
0
5
0
163 of 230
12
--
--
0
4
0
11
--
--
1
3
0
DS3170 DS3/E3 Single-Chip Transceiver
TFCL
10
--
0
2
0
TFS1
--
9
0
1
0
TFS0
--
8
0
0
0