DS3170 Maxim Integrated Products, DS3170 Datasheet - Page 45

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DS3170

Manufacturer Part Number
DS3170
Description
Network Controller & Processor ICs DS3-E3 Single-Chip T ransceiver T3-E3 Fra
Manufacturer
Maxim Integrated Products
Datasheet

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Figure 8-23. SPI Serial Port Access For Write Mode, SPI_CPOL = 0, SPI_CPHA = 0
Figure 8-24. SPI Serial Port Access For Write Mode, SPI_CPOL = 1, SPI_CPHA = 0
Figure 8-25. SPI Serial Port Access For Write Mode, SPI_CPOL = 0, SPI_CPHA = 1
Figure 8-26. SPI Serial Port Access For Write Mode, SPI_CPOL = 1, SPI_CPHA = 1
8.3.4.2
Figure 8-27
the A[0]/BSWAP signal controls whether or not to byte swap. In 8-bit mode, the A[0]/BSWAP signal is used as the
LSB of the address bus (A[0]). The selection of databus size is determined by the WIDTH input signal. See also
Section 10.1.1.
MOSI
MISO
MOSI
MISO
MOSI
MISO
MOSI
MISO
SCK
SCK
SCK
SCK
CS*
CS*
CS*
CS*
Parallel Port Interface Diagrams
MSB
MSB
MSB
MSB
and
0
0
0
0
A13
A13
A13
A13
Figure 8-29
A12
A12
A12
A12
A11
A11
A11
A11
A10
A10
A10
A10
show examples of a 16-bit databus and an 8-bit databus, respectively. In 16-bit mode,
A9
A9
A9
A9
A8
A8
A8
A8
LSB
LSB
LSB
LSB
A7
A7
A7
A7
MSB
MSB
MSB
MSB
A6
A6
A6
A6
A5
A5
A5
A5
45 of 230
A4
A4
A4
A4
A3
A3
A3
A3
A2
A2
A2
A2
A1
A1
A1
A1
A0
A0
A0
A0
DS3170 DS3/E3 Single-Chip Transceiver
LSB
LSB
LSB
LSB
B
B
B
B
MSB
MSB
MSB
MSB
D7
D7
D7
D7
D6
D6
D6
D6
D5
D5
D5
D5
D4
D4
D4
D4
D3
D3
D3
D3
D2
D2
D2
D2
D1
D1
D1
D1
LSB
LSB
LSB
LSB
D0
D0
D0
D0

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