DS3170 Maxim Integrated Products, DS3170 Datasheet - Page 203

• Manufacturer Part Number: DS3170
• Description: Network Controller & Processor ICs DS3-E3 Single-Chip T ransceiver T3-E3 Fra
• Manufacturer: Maxim Integrated Products

13.2 JTAG TAP Controller State Machine Description
This section covers the details on the operation of the Test Access Port (TAP) Controller State Machine. See
Figure 13-2
responds to the logic level at JTMS on the rising edge of JTCLK.
Figure 13-2. JTAG TAP Controller State Machine
Test-Logic-Reset. When JTRST is changed from low to high, the TAP controller starts in the Test-Logic-Reset
state, and the Instruction Register is loaded with the IDCODE instruction. All system logic and I/O pads on the
device operate normally. This state can also be reached from any other state by holding JTMS high and clocking
JTCLK five times.
Run-Test-Idle. Run-Test-Idle is used between scan operations or during specific tests. The Instruction Register
and Test Register remain idle.
Select-DR-Scan. All test registers retain their previous state. With JTMS low, a rising edge of JTCLK moves the
controller into the Capture-DR state and initiates a scan sequence. JTMS high moves the controller to the Select-
IR-Scan state.
for details on each of the states described below. The TAP controller is a finite state machine that
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Test-Logic-Reset
Run-Test/Idle
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Capture-DR
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Select
DR-Scan
Shift-DR
Pause-DR
Update-DR
Exit1- DR
Exit2-DR
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DS3170 DS3/E3 Single-Chip Transceiver
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Capture-IR
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Select
IR-Scan
Shift-IR
Exit1-IR
Pause-IR
Exit2-IR
Update-IR
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