DS3170 Maxim Integrated Products, DS3170 Datasheet - Page 193

• Manufacturer Part Number: DS3170
• Description: Network Controller & Processor ICs DS3-E3 Single-Chip T ransceiver T3-E3 Fra
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 5: Transmit Payload Type (TPT[2:0]) – These bits determines the value transmitted in the payload type
(third, fourth, and fifth bits in the MA byte).
Bit 4: Transmit Timing Source Indicator Bit Generation Disable (TTIGD) – When 0, the last three bits of the MA
byte (MA[6:8]) are generated from the four timing source indicator bits TTI[3:0]. When 1, TTI[3] is ignored and
TTI[2:0] are directly inserted into the last three bits of the MA byte.
Bits 3 to 0: Transmit Timing Source Indication (TTI[3:0]) – These four bits make up the timing source indicator
bits.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 8: Transmit GC Byte (TGC[7:0]) – These eight bits are the GC byte to be inserted into the E3 frame.
Bits 7 to 0: Transmit NR Byte (TNR[7:0]) – These eight bits are the NR byte to be inserted into the E3 frame.
TGC7
TNR7
TPT2
15
15
--
0
7
0
0
7
0
TGC6
TNR6
TPT1
14
14
--
0
6
0
0
6
0
E3G832.TMABR
E3 G.832 Transmit MA Byte Register
11Ch
E3G832.TNGBR
E3 G.832 Transmit NR and GC Byte Register
11Eh
TGC5
TNR5
TPT0
13
13
--
0
5
0
0
5
0
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TTIGD
TGC4
TNR4
12
12
--
0
4
0
0
4
0
TGC3
TNR3
TTI3
11
11
--
0
3
0
0
3
0
DS3170 DS3/E3 Single-Chip Transceiver
TGC2
TNR2
TTI2
10
10
--
0
2
0
0
2
0
TGC1
TNR1
TTI1
--
9
0
1
0
9
0
1
0
TGC0
TNR0
TTI0
--
8
0
0
0
8
0
0
0