ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 86

• Manufacturer Part Number: ADUC7034BCPZ-RL
• Description: IC,Battery Management,LLCC,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7034BCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7034
GENERAL-PURPOSE I/O REGISTERS
GPIO Port0 Control Register
Name:
Address:
Default Value:
Access:
Function:
Table 58. GP0CON MMR Bit Designations
Bit
31 to 29
28
27 to 25
24
23 to 21
20
19 to 17
16
15 to 13
12
11 to 9
8
7 to 5
4
3 to 1
0
GP0CON
0xFFFF0D00
0x11100000
Read/write
This 32-bit MMR selects the pin function for each Port0 pin.
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Reserved. This bit is reserved and should be written as 1 by user code.
Reserved. These bits are reserved and should be written as 0 by user code.
Internal P0.6 enable bit. This bit must be set to 1 by user software before the HVCON and HVDAT MMRs can be used to
indirectly access the high voltage serial interface.
Reserved. These bits are reserved and should be written as 0 by user code.
Internal P0.5 enable bit. This bit must be set to 1 by user software before the HVCON and HVDAT MMRs can be used to
indirectly access the high voltage serial interface.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_4 function select bit.
Set to 1 by user code to configure the GPIO_4 pin as ECLK, enabling a 2.56 MHz clock output on this pin.
Cleared by user code to 0 to configure the GPIO_4 pin as a general-purpose I/O (GPIO) pin.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_3 function select bit.
Set to 1 by user code to configure the GPIO_3 pin as MOSI (master output, slave input) data for the SPI port.
Cleared by user code to 0 to configure the GPIO_3 pin as a general-purpose I/O (GPIO) pin.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_2 Function Select Bit.
Set to 1 by user code to configure the GPIO_2 pin as MISO (master input, slave output) data for the SPI port.
Cleared to 0 by user code to configure the GPIO_2 pin as a general-purpose I/O (GPIO) pin.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_1 function select bit.
Set to 1 by user code to configure the GPIO_1 pin as SCLK I/O for the SPI port.
Cleared to 0 by user code to configure the GPIO_1 pin as a general-purpose I/O (GPIO) pin.
Reserved. These bits are reserved and should be written as 0 by user code.
GPIO_0 function select bit.
Set to 1 by user code to configure the GPIO_0 pin as SS I/O for the SPI port.
Cleared to 0 by user code to configure the GPIO_0 pin as a general-purpose I/O (GPIO) pin.
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