ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 93

IC,Battery Management,LLCC,48PIN,PLASTIC

ADUC7034BCPZ-RL

Manufacturer Part Number
ADUC7034BCPZ-RL
Description
IC,Battery Management,LLCC,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7034BCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
GPIO Port2 Set Register
Name:
Address:
Access:
Function:
Table 66. GP2SET MMR Bit Designations
Bit
31 to 23
22
21
20 to 18
17
16
15 to 0
GPIO Port0 Clear Register
Name:
Address:
Access:
Function:
Table 67. GP0CLR MMR Bit Designations
Bit
31 to 21
20
19
18
17
16
15 to 0
GP2SET
0xFFFF0D44
Write only
This 32-bit MMR allows user code to individually bit-address external GPIO pins to set them high only. User code can
accomplish this using the GP2SET MMR without having to modify or maintain the status of the GPIO pins (as user code
requires when using GP2DAT).
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Port2.6 set bit.
Set to 1 by user code to set the external GPIO_13 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_13 pin.
Port2.5 set bit.
Set to 1 by user code to set the external GPIO_12 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_12 pin.
Reserved. These bits are reserved and should be written as 0 by user code.
Port2.1 set bit.
Set to 1 by user code to set the external GPIO_8 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_8 pin.
Port2.0 set bit.
Set to 1 by user code to set the external GPIO_7 pin high.
Clearing this bit to 0 via user software has no effect on the external GPIO_7 pin.
Reserved. These bits are reserved and should be written as 0 by user code.
GP0CLR
0xFFFF0D28
Write only
This 32-bit MMR allows user code to individually bit-address external GPIO pins to clear them low only. User code can
accomplish this using the GP0CLR MMR without having to modify or maintain the status of the GPIO pins (as user code
requires when using GP0DAT).
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Port0.4 clear bit.
Set to 1 by user code to clear the external GPIO_4 pin low.
Clearing this bit to 0 via user software has no effect on the external GPIO_4 pin.
Port0.3 clear bit.
Set to 1 by user code to clear the external GPIO_3 pin low.
Clearing this bit to 0 via user software has no effect on the external GPIO_3 pin.
Port0.2 clear bit.
Set to 1 by user code to clear the external GPIO_2 pin low.
Clearing this bit to 0 via user software has no effect on the external GPIO_2 pin.
Port0.1 clear bit.
Set to 1 by user code to clear the external GPIO_1 pin low.
Clearing this bit to 0 via user software has no effect on the external GPIO_1 pin.
Port0.0 Clear Bit.
Set to 1 by user code to clear the external GPIO_0 pin low.
Clearing this bit to 0 via user software has no effect on the external GPIO_0 pin.
Reserved. These bits are reserved and should be written as 0 by user code.
Rev. B | Page 93 of 136
ADuC7034

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