ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 22

• Manufacturer Part Number: ADUC7034BCPZ-RL
• Description: IC,Battery Management,LLCC,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7034BCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7034
The maximum IRQ latency can be similarly calculated, but
must allow for the fact that FIQ has higher priority and may
delay entry into the IRQ handling routine for an arbitrary
length of time. This time can be reduced to 42 cycles if the LDM
command is not used; some compilers have an option to
compile without using this command. Another option is to run
the part in Thumb mode, which reduces the time to 22 cycles.
The minimum latency for a FIQ or IRQ is five cycles. This
consists of the shortest time for the request to pass through the
synchronizer plus the time to enter the exception mode.
Note that the ARM7TDMI initially (first instruction) runs in
ARM (32-bit) mode when an exception occurs. The user can
immediately switch from ARM mode to Thumb mode if required,
for example, when executing interrupt service routines.
MEMORY ORGANIZATION
The ARM7 MCU core, which has a von Neumann-based
architecture, sees memory as a linear array of 2
As shown in Figure 13, the ADuC7034 maps this into four
distinct user areas, namely, a memory area that can be remapped,
an SRAM area, a Flash/EE area, and a memory-mapped register
(MMR) area.
•
•
•
•
Any access, either a read or a write, to an area not defined in the
memory map results in a data abort exception.
Memory Format
The ADuC7034 memory organization is configured in little
endian format: the least significant byte is located in the lowest
byte address; the most significant byte, in the highest byte address.
For the ADuC7034, the first 30 kB of this memory space is
used as an area into which the on-chip Flash/EE or SRAM
can be remapped.
The ADuC7034 features a second 4 kB area at the top of
the memory map used to locate the MMRs, through which
all on-chip peripherals are configured and monitored.
The ADuC7034 features an SRAM size of 4 kB.
The ADuC7034 features 32 kB of on-chip Flash/EE
memory, 30 kB of which are available to the user and 2 kB
of which are reserved for the on-chip kernel.
BIT 31
BYTE 3
B
7
3
.
.
.
BYTE 2
Figure 12. Little Endian Format
A
6
2
.
.
.
32 BITS
BYTE 1
9
5
1
.
.
.
BYTE 0
8
4
0
.
.
.
BIT 0
0xFFFFFFFF
0x00000004
0x00000000
32
byte locations.
Rev. B | Page 22 of 136
SRAM
The ADuC7034 features 4 kB of SRAM, organized as 1024 ×
32 bits, that is, 1024 words located at 0x00040000.
The RAM space can be used as data memory and also as a
volatile program space.
ARM code can run directly from SRAM at full clock speed
because the SRAM array is configured as a 32-bit-wide memory
array. SRAM is readable/writeable in 8-/16-/32-bit segments.
Remap
The ARM exception vectors are situated at the bottom of the
memory array, from Address 0x00000000 to Address 0x00000020.
By default, after a reset, the Flash/EE memory is mapped to
Address 0x00000000.
It is possible to remap the SRAM to Address 0x00000000. This is
accomplished by setting Bit 0 of the SYSMAP0 MMR. To revert
Flash/EE to Address 0x00000000, Bit 0 of SYSMAP0 is cleared.
It is sometimes desirable to remap RAM to Address 0x00000000
to optimize the interrupt latency of the ADuC7034 because
code can run in full 32-bit ARM mode and at maximum core
speed. It should be noted that when an exception occurs, the
core defaults to ARM mode.
0xFFFF0000
0x00080000
0x00040000
0x00000000
Figure 13. ADuC7034 Memory Map
0xFFFF0FFF
0x00087FFF
0x00040FFF
0x00007FFF
RESERVED
MMRs
RESERVED
FLASH/EE
RESERVED
SRAM
RESERVED
REMAPPABLE MEMORY SPACE
(FLASH/EE OR SRAM)