ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 23

• Manufacturer Part Number: ADUC7034BCPZ-RL
• Description: IC,Battery Management,LLCC,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7034BCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Remap Operation
When a reset occurs on the ADuC7034, execution starts
automatically in the factory-programmed internal configuration
code. This so-called kernel is hidden and cannot be accessed by
user code. If the ADuC7034 is in normal mode, it executes the
power-on configuration routine of the kernel and then jumps to
the reset vector, Address 0x00000000, to execute the user’s reset
exception routine. Because the Flash/EE is mirrored at the
bottom of the memory array at reset, the reset routine must
always be written in Flash/EE.
The remap command must be executed from the absolute Flash/EE
address, not from the mirrored, remapped segment of memory,
which may be replaced by SRAM. If a remap operation is executed
while operating code from the mirrored location, prefetch/data
aborts may occur or the user may observe abnormal program
operation.
Any kind of reset remaps the Flash/EE memory to the bottom
of the memory array.
Rev. B | Page 23 of 136
SYSMAP0 Register
Name:
Address:
Default Value:
Access:
Function:
Table 10. SYSMAP0 MMR Bit Designations
Bit
7 to 1
0
SYSMAP0
Updated by the kernel
Read/write access
This 8-bit register allows user code to remap
either RAM or Flash/EE space into the bottom
of the ARM memory space, starting at Address
0x00000000.
0xFFFF0220
Description
Reserved. These bits are reserved and should
be written as 0 by user code.
Remap bit.
Set by the user to remap the SRAM to
Address 0x00000000.
Cleared automatically after a reset to remap
the Flash/EE memory to Address 0x00000000.
ADuC7034