ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 52
![IC,Battery Management,LLCC,48PIN,PLASTIC](/photos/6/50/65022/cp-48-8_sml.jpg)
ADUC7034BCPZ-RL
Manufacturer Part Number
ADUC7034BCPZ-RL
Description
IC,Battery Management,LLCC,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.ADUC7034BCPZ-RL.pdf
(136 pages)
Specifications of ADUC7034BCPZ-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 52 of 136
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ADuC7034
Current Channel ADC Data Register
Name:
Address:
Default Value:
Access:
Function:
Voltage Channel ADC Data Register
Name:
Address:
Default Value:
Access:
Function:
Temperature Channel ADC Data Register
Name:
Address:
Default Value:
Access:
Function:
ADC0DAT
0xFFFF0520
0x0000
Read only
This ADC data MMR holds the 16-bit
conversion result from the I-ADC. The ADC
does not update this MMR if the ADC0
conversion result ready bit (ADCSTA[0]) is
set. A read of this MMR by the MCU clears all
asserted ready flags (ADCSTA[2:0]).
ADC1DAT
0xFFFF0524
0x0000
Read only
This ADC data MMR holds the 16-bit voltage
conversion result from the V-/T-ADC. The
ADC does not update this MMR if the voltage
conversion result ready bit (ADCSTA[1]) is
set. If I-ADC is not active, a read of this MMR
by the MCU clears all asserted ready flags
(ADCSTA[2:1]).
ADC2DAT
0xFFFF0528
0x0000
Read only
This ADC data MMR holds the 16-bit
temperature conversion result from the V-/T-
ADC. The ADC does not update this MMR if
the temperature conversion result ready bit
(ADCSTA[2]) is set. A read of this MMR
clears ADCSTA[2].
Rev. B | Page 52 of 136
Current Channel ADC Offset Calibration Register
Name:
Address:
Default Value:
Access:
Function:
Voltage Channel ADC Offset Calibration Register
Name:
Address:
Default Value:
Access:
Function:
ADC0OF
0xFFFF0530
Part specific, factory programmed
Read/write access
This ADC offset MMR holds a 16-bit offset
calibration coefficient for the I-ADC. The
register is configured at power-on with a
factory-set default value. However, the value of
this register is automatically overwritten if an
offset calibration of the I-ADC is initiated by the
user via bits in the ADCMDE MMR. User code
can only write to this calibration register after
the ADC is in idle mode for at least 23 μs.
Therefore, the ADC must be enabled and in
idle mode for at least 23 μs before an offset or
gain register can be written to.
ADC1OF
0xFFFF0534
Part specific, factory programmed
Read/write access
This offset MMR holds a 16-bit offset
calibration coefficient for the voltage channel.
The register is configured at power-on with a
factory-set default value. However, the value of
this register is automatically overwritten if an
offset calibration of the voltage channel is
initiated by the user via bits in the ADCMDE
MMR. User code can only write to this
calibration register after the ADC is in idle
mode for at least 23 μs. Therefore, the ADC
must be enabled and in idle mode for at least
23 μs before an offset or gain register can be
written to.
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