ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 70

IC,Battery Management,LLCC,48PIN,PLASTIC

ADUC7034BCPZ-RL

Manufacturer Part Number
ADUC7034BCPZ-RL
Description
IC,Battery Management,LLCC,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7034BCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADuC7034
Programmed Interrupts
Because the programmed interrupts are not maskable, they are
controlled by another register, SWICFG, that writes into both
IRQSTA and IRQSIG registers and/or the FIQSTA and FIQSIG
registers at the same time.
The 32-bit register dedicated to a software interrupt is SWICFG
and is described in Table 50. This MMR allows the control of a
programmed source interrupt.
Table 50. SWICFG MMR Bit Designations
Bit
31 to 3
2
1
0
Description
Reserved.
Programmed interrupt FIQ.
Setting/clearing this bit corresponds to
setting/clearing Bit 1 of FIQSTA and FIQSIG.
Programmed interrupt IRQ.
Setting/clearing this bit corresponds to
setting/clearing Bit 1 of IRQSTA and IRQSIG.
Reserved.
Rev. B | Page 70 of 136
Note that any interrupt signal must be active for at least the
minimum interrupt latency time to be detected by the interrupt
controller and by the user in the IRQSTA/FIQSTA register.
FLASH/EE
PLL LOCK
FLASH/EE
PLL LOCK
LIN H/W
LIN H/W
TIMER0
TIMER1
TIMER2
TIMER3
TIMER0
TIMER1
TIMER2
TIMER3
XIRQx
XIRQx
UART
UART
ADC
ADC
SPI
SPI
Figure 31. Interrupt Structure
IRQ
FIQ

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