UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 997
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1001GA-HAA-AX
Manufacturer Part Number
UPD78F1001GA-HAA-AX
Description
MCU 16BIT 78K0R/KX3-L 44-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GA-HAA-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GA-HAA-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 997 of 1171
- Download datasheet (8Mb)
78K0R/Kx3-L
Programming Function User’s Manual (U18371E).
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Notes 1. Address differs depending on products as follows.
For details of the way to secure of the memory space, refer to the QB-MINI2 On-Chip Debug Emulator with
Boot cruster 1
Boot cruster 0
2. In debugging, reset vector is rewritten to address allocated to a monitor program.
3. Since this area is allocated immediately before the stack area, the address of this area varies depending on
the stack increase and decrease. That is, 6 extra bytes are consumed for the stack area used.
μ
μ
μ
μ
μ
μ
μ
μ
PD78F1000 (16 KB)
PD78F1001, 78F1004, 78F1007 (32 KB)
PD78F1002, 78F1005, 78F1008 (48 KB)
PD78F1003, 78F1006, 78F1009, 78F1010 (64 KB)
PD78F1011, 78F1013 (96 KB)
PD78F1012, 78F1014 (128 KB)
PD78F1027, 78F1029 (192 KB)
PD78F1028, 78F1030 (256 KB)
0 2 0 0 0 H
0 1 0 D 8 H
0 1 0 C E H
0 1 0 C 4 H
0 1 0 C 3 H
0 1 0 0 2 H
0 1 0 0 0 H
0 0 0 D 8 H
0 0 0 C E H
0 0 0 C 4 H
0 0 0 C 3 H
0 0 0 0 2 H
0 0 0 0 0 H
Note 1
Figure 27-2. Memory Spaces Where Debug Monitor Programs Are Allocated
Products
Debug monitor area
Debug monitor area
Debug monitor area
Debug monitor area
Security ID area
Security ID area
Internal ROM
(10 bytes)
(10 bytes)
(10 bytes)
(10 bytes)
(2 bytes)
(2 bytes)
Note 2
Note 2
(1 KB)
( ): Internal ROM
Internal ROM
area
On-chip debug option byte area
On-chip debug option byte area
03C00H to 03FFFH
07C00H to 07FFFH
0BC00H to 0BFFFH
0FC00H to 0FFFFH
17C00H to 17FFFH
1FC00H to 1FFFFH
2FC00H to 2FFFFH
3FC00H to 3FFFFH
CHAPTER 27 ON-CHIP DEBUG FUNCTION
(1 byte)
(1 byte)
Address of Note 1
Stack area for debugging
: Area used for on-chip debugging
Use prohibited
Internal RAM
(6 bytes)
Note 3
Internal RAM
area
997
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