UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 1069

• Manufacturer Part Number: UPD78F1001GA-HAA-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1001GA-HAA-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
30.6.6 Comparator characteristics
(T
Notes 1. Characteristics of pulse response when CMP0P input or programmable gain amplifier output changes from the
Remark Operation stabilization wait time:
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Input offset voltage
Input voltage range
Internal reference voltage deviation
Response time
Operation stabilization wait time
Reference voltage stabilization wait
time
A
Caution The pins mounted depend on the product. Refer to Caution 2 at the beginning of this chapter.
= −40 to +85°C, 2.7 V ≤ V
2. Characteristics of pulse response when CMP0P input or programmable gain amplifier output changes from the
Reference voltage stabilization wait time:
comparator reference voltage −100 mV to the comparator reference voltage +100 mV.
comparator reference voltage +100 mV to the comparator reference voltage −100 mV.
Parameter
Output voltage V
Input voltage V
CHAPTER 30 ELECTRICAL SPECIFICATIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
DD
IN
O
≤ 5.5 V, 2.7 V ≤ AV
VIO
VI
Δ
t
t
t
t
Symbol
CR
CF
CMP
VR
V
CMP
IREF
Comparator
CMP
ref. voltage
+100 mV
-100 mV
Input amplitude = ±100 mV,
at rising edge
Input amplitude = ±100 mV,
at falling edge
5 V
0 V
Time required until a state is entered where the DC and AC
specifications of the comparator are satisfied after the operation of the
comparator has been enabled (CnEN bit of comparator n control register
(CnCTL) = 1) (n = 0, 1)
Time required until the voltage level of the internal reference voltage circuit
reaches 99% of the ideal value after the internal reference voltage has been
enabled (CnVRE bit of comparator n internal reference voltage setting
register (CnRVM) = 1) (n = 0, 1)
REF
Note 1
Note 2
≤ V
Conditions
DD
, V
SS
t
CR
= AV
SS
= 0 V)
t
CF
0.1AV
MIN.
REF
TYP.
150
150
2.5
±5
0.9AV
MAX.
±40
300
300
10
1
1
REF
Unit
mV
ns
ns
μ
μ
%
V
s
s
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