UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 384
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UPD78F1001GA-HAA-AX
Manufacturer Part Number
UPD78F1001GA-HAA-AX
Description
MCU 16BIT 78K0R/KX3-L 44-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GA-HAA-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GA-HAA-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
7.6.7 Condition before changing CPU clock and processing after changing CPU clock
Note
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Internal high-
speed oscillation
clock
X1 clock
External main
system clock
Before Change
Condition before changing the CPU clock and processing after changing the CPU clock are shown below.
The 78K0R/KC3-L (40-pin) doesn’t have the subsystem clock.
CPU Clock
X1 clock
External main
system clock
Subsystem clock
Note
20 MHz internal
high-speed
oscillation clock
Internal high-
speed oscillation
clock
External main
system clock
Subsystem clock
Note
20 MHz internal
high-speed
oscillation clock
Internal high-
speed oscillation
clock
X1 clock
Subsystem clock
Note
20 MHz internal
high-speed
oscillation clock
After Change
Stabilization of X1 oscillation
• OSCSEL = 1, EXCLK = 0, MSTOP = 0
• After elapse of oscillation stabilization time
Enabling input of external clock from the
EXCLK pin
• OSCSEL = 1, EXCLK = 1, MSTOP = 0
Stabilization of XT1 oscillation
• OSCSELS = 1, XTSTOP = 0
• After elapse of oscillation stabilization time
Stabilization of DSC oscillation with 20 MHz
set by using the option byte
• V
• After elapse of oscillation stabilization
• SELDSC = 1
Oscillation of internal high-speed oscillator
• HIOSTOP = 0
Transition not possible
(To change the clock, set it again after
Stabilization of XT1 oscillation
• OSCSELS = 1, XTSTOP = 0
• After elapse of oscillation stabilization time
Transition cannot be performed unless the
clock is changed to the internal high-speed
oscillation clock once.
Oscillation of internal high-speed oscillator
• HIOSTOP = 0
Transition not possible
(To change the clock, set it again after
executing reset once.)
Stabilization of XT1 oscillation
• OSCSELS = 1, XTSTOP = 0
• After elapse of oscillation stabilization time
Transition cannot be performed unless the
clock is changed to the internal high-speed
oscillation clock once.
executing reset once.)
time (100
DD
≥ 2.7 V
Table 7-5. Changing CPU Clock (1/2)
Condition Before Change
μ
s) after setting to DSCON = 1
Operating current can be reduced by
stopping internal high-speed oscillator
(HIOSTOP = 1).
X1 oscillation can be stopped (MSTOP = 1).
X1 oscillation can be stopped (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
CHAPTER 7 CLOCK GENERATOR
Processing After Change
−
−
−
−
−
384
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