UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 585

• Manufacturer Part Number: UPD78F1001GA-HAA-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1001GA-HAA-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Remark m: Unit number (m = 0 to 2), n: Channel number (n = 0 to 3), p: CSI number (p = 00, 01, 10, 20, 40, 41),
Note The lower 8 bits of serial data register mn (SDRmn) can be read or written as the following SFR, depending on
Shift register
Buffer register
Serial clock I/O
Serial data input
Serial data output
Serial data I/O
Control registers
the communication mode.
Item
q: UART number (q = 0 to 4), r: IIC number (r = 10, 20)
• CSIp communication … SIOp (CSIp data register)
• UARTq reception … RXDq (UARTq receive data register)
• UARTq transmission … TXDq (UARTq transmit data register)
• IICr communication … SIOr (IICr data register)
Table 14-1. Configuration of Serial Array Unit (2/2) (78K0R/KF3-L, 78K0R/KG3-L)
8 bits
Lower 8 bits of serial data register mn (SDRmn)
SCK00, SCK01, SCK10, SCK20 pins (for 3-wire
serial I/O), SCL10, SCL20 pins (for simplified
I
SI00, SI01, SI10, SI20 pins (for 3-wire serial I/O),
R
UART supporting LIN-bus)
SO00, SO01, SO10, SO20 pins (for 3-wire serial
I/O), T
T
controller
SDA10, SDA20 pins (for simplified I
<Registers of unit setting block>
• Peripheral enable register 0 (PER0)
• Serial clock select register m (SPSm)
• Serial channel enable status register m (SEm)
• Serial channel start register m (SSm)
• Serial channel stop register m (STm)
• Serial output enable register m (SOEm)
• Serial output register m (SOm)
• Serial output level register m (SOLm)
• Input switch control register (ISC)
• Noise filter enable register 0 (NFEN0)
<Registers of each channel>
• Serial data register mn (SDRmn)
• Serial mode register mn (SMRmn)
• Serial communication operation setting register mn (SCRmn)
• Serial status register mn (SSRmn)
• Serial flag clear trigger register mn (SIRmn)
• Port input mode registers 0, 1, 14 (PIM0, PIM1, PIM14)
• Port output mode registers 0, 1, 14 (POM0, POM1, POM14)
• Port mode registers 0, 1, 4, 14 (PM0, PM1, PM4, PM14)
• Port registers 0, 1, 4, 14 (P0, P1, P4, P14
2
C)
X
X
μ
D3 pin (for UART supporting LIN-bus), output
D0 to RxD2 pins (for UART), R
PD78F1010, 78F1011, 78F1012, 78F1013,
X
D0 to TxD2 pins (for UART),
78F1014
X
D3 pin (for
2
C)
Configuration
Note
SCK00, SCK01, SCK10, SCK20, SCK40, SCK41
pins (for 3-wire serial I/O), SCL10, SCL20 pins
(for simplified I
SI00, SI01, SI10, SI20, SI40, SI41 pins (for 3-
wire serial I/O), R
UART), R
SO00, SO01, SO10, SO20, SO40, SO41 pins
(for 3-wire serial I/O), T
(for UART), T
bus), output controller
<Registers of unit setting block>
• Peripheral enable registers 0, 1 (PER0, PER1)
• Serial clock select register m (SPSm)
• Serial channel enable status register m (SEm)
• Serial channel start register m (SSm)
• Serial channel stop register m (STm)
• Serial output enable register m (SOEm)
• Serial output register m (SOm)
• Serial output level register m (SOLm)
• Input switch control register (ISC)
• Noise filter enable register 0 (NFEN0)
μ
PD78F1027, 78F1028, 78F1029, 78F1030
CHAPTER 14 SERIAL ARRAY UNIT
X
D3 pin (for UART supporting LIN-bus)
X
D3 pin (for UART supporting LIN-
2
C)
X
D0 to RxD2, RxD4 pins (for
X
D0 to TxD2, TxD4 pins
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