UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 480
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UPD78F1001GA-HAA-AX
Manufacturer Part Number
UPD78F1001GA-HAA-AX
Description
MCU 16BIT 78K0R/KX3-L 44-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GA-HAA-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GA-HAA-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 480 of 1171
- Download datasheet (8Mb)
78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
TAU
default
setting
Channel
default
setting
(Note and Remark are listed on the next page.)
Sets slave channel.
Sets the TAU0EN and TAU1EN bits of peripheral enable
registers 0, 2 (PER0, PER2) to 1.
Sets timer clock select register m (TPSm).
Sets timer mode registers mn, mp (TMRmn, TMRmp) of
two channels to be used (determines operation mode of
channels).
An interval (period) value is set to timer data register mn
(TDRmn) of the master channel, and a duty factor is set
to the TDRmp register of the slave channel.
The TOMmp bit of timer output mode register m
(TOMm) is set to 1 (slave channel output mode).
Sets the TOLmp bit.
Sets the TOmp bit and determines default level of the
TOmp output.
Sets the TOEmp bit to 1 and enables operation of TOmp.
Clears the port register and port mode register to 0.
Determines clock frequencies of CKm0 and CKm1.
Figure 8-70. Operation Procedure When PWM Function Is Used (1/2)
Software Operation
Note
Channel stops operating.
(Clock is supplied and some power is consumed.)
Power-off status
Power-on status. Each channel stops operating.
The TOmp pin goes into Hi-Z output state.
The TOmp default setting level is output when the port
mode register is in output mode and the port register is 0.
TOmp does not change because channel stops operating.
The TOmp pin outputs the TOmp set level.
(Clock supply is stopped and writing to each register is
disabled.)
(Clock supply is started and writing to each register is
enabled.)
CHAPTER 8 TIMER ARRAY UNIT
Hardware Status
480
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