UPD78F1001GA-HAA-AX Renesas Electronics America, UPD78F1001GA-HAA-AX Datasheet - Page 194
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD78F1001GA-HAA-AX
Manufacturer Part Number
UPD78F1001GA-HAA-AX
Description
MCU 16BIT 78K0R/KX3-L 44-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GA-HAA-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GA-HAA-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
5.2.2 Port 1
Notes 1.
Remark √: Mounted
mode register 1 (PM1). When the P10 to P17 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 1 (PU1).
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P10/TI02/TO02
P11/TO00/TI03/
TO03
P12/TI04/TO04/
RTCDIV/RTCCL
P13/TI05/TO05
P14/TI06/TO06
P15/TI07/TO07
P16
P17
Port 1 is an I/O port with an output latch. Port 1 can be set to the input mode or output mode in 1-bit units using port
This port can also be used for timer I/O and real-time counter clock output.
Reset signal generation sets port 1 to input mode.
Figures 5-3 and 5-4 show block diagrams of port 1.
Caution
2.
40-pin product of the 78K0R/KC3-L does not have a RTCDIV/RTCCL pin.
TI06/TO06 and TI07/TO07 are shared with P50 and P51, respectively, in products other than the 78K0R/KE3-
L.
To use P10/TI02/TO02, P11/TI03/TO03, P12/TI04/TO04/RTCDIV/RTCCL, P13/TI05/TO05, P14/TI06/TO06, or
P15/TI07/TO07 as a general-purpose port, set bits 2 to 7 (TO02 to TO07) of timer output register 0
(TO0) and bits 2 to 7 (TOE02 to TOE07) of timer output enable register 0 (TOE0) to “0”, which is the
same as their default status setting.
P12/TI04/
TO04
(
μ PD78F100y: y = 0 to 3)
40-pin
Note 1
78K0R/KC3-L
−
−
CHAPTER 5 PORT FUNCTIONS (78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L)
Note 2
Note 2
√
√
√
−
−
44-pin
√
(
μ PD78F100y: y = 1 to 3)
78K0R/KC3-L (48-pin)
−
−
Note 2
Note 2
√
√
√
√
−
−
(
μ PD78F100y: y = 4 to 6)
78K0R/KD3-L
−
−
Note 2
Note 2
√
√
√
√
−
−
(
μ PD78F100y: y = 7 to 9)
78K0R/KE3-L
√
√
√
√
√
√
√
√
194
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