UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 983

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UPD78F1000GB-GAF-AX

Manufacturer Part Number
UPD78F1000GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet

Specifications of UPD78F1000GB-GAF-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1000GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
78K0R/Kx3-L
26.5 Registers Controlling Flash Memory
(1) Background event control register (BECTL)
26.6 Programming Method
26.6.1 Controlling flash memory
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: FFFBEH
The following figure illustrates the procedure to manipulate the flash memory.
Symbol
BECTL
Even if the FLMD0 pin is not controlled externally, it can be controlled by software with the BECTL register to set the
self-programming mode.
However, depending on the processing of the FLMD0 pin, it may not be possible to set the self-programming mode by
software. When using the BECTL register, leaving the FLMD0 pin open is recommended. When pulling it down
externally, use a resistor with a resistance of 100 kΩ or more. In addition, in the normal operation mode, use the
BECTL register with the pull down selection. In the self-programming mode, the setting is switched to pull up in the
self- programming library.
The BECTL register is set by a 1-bit or 8-bit memory manipulation instruction.
Reset input sets this register to 00H.
FLMDPUP
FLMDPUP
0
1
7
After reset: 00H
Controlling FLMD0 pin and RESET pin
Figure 26-13. Format of Background Event Control Register (BECTL)
Selects pull-down
Selects pull-up
6
0
Figure 26-14. Flash Memory Manipulation Procedure
R/W
5
0
4
0
Software control of FLMD0 pin
Flash memory programming
mode is set
Manipulate flash memory
3
0
End?
Start
End
Yes
CHAPTER 26 FLASH MEMORY
2
0
No
1
0
0
0
983

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