UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 338
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UPD78F1000GB-GAF-AX
Manufacturer Part Number
UPD78F1000GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1000GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1000GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
7.1 Functions of Clock Generator
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
The clock generator generates the clock to be supplied to the CPU and peripheral hardware.
The following three kinds of system clocks and clock oscillators are selectable.
(1) Main system clock
(2) Subsystem clock
Note
Remark f
<1> X1 oscillator
<2> Internal high-speed oscillator
<3> 20 MHz internal high-speed oscillation clock oscillator
An external main system clock (f
main system clock input can be disabled by executing the STOP instruction or setting of the MSTOP bit.
As the main system clock, a high-speed system clock (X1 clock or external main system clock) or internal high-
speed oscillation clock can be selected by setting of the MCM0 bit (bit 4 of the system clock control register (CKC)).
• XT1 clock oscillator
This circuit oscillates a clock of f
Oscillation can be stopped by setting the XTSTOP bit (bit 6 of the clock operation status control register (CSC)).
The 78K0R/KC3-L (40-pin) doesn’t have the subsystem clock.
This circuit oscillates a clock of f
Oscillation can be stopped by executing the STOP instruction or setting of the MSTOP bit (bit 7 of the clock
operation status control register (CSC)).
This circuit oscillates clocks of f
operating with this internal high-speed oscillation clock. Oscillation can be stopped by executing the STOP
instruction or setting the HIOSTOP bit (bit 0 of the CSC register).
This circuit oscillates a clock of f
the 20 MHz internal high-speed oscillation control register (DSCCTL) to 1 with V
be stopped by setting the DSCON bit to 0.
Note To use the 1, 8, or 20 MHz internal high-speed oscillation clock, use the option byte to set the
f
f
f
f
X
IH
IH20
EX
SUB
:
:
:
: Subsystem clock frequency
: 20 MHz internal high-speed oscillation clock frequency
X1 clock oscillation frequency
Internal high-speed oscillation clock frequency
External main system clock frequency
frequency in advance (for details, see CHAPTER 25 OPTION BYTE). Also, the internal high-speed
oscillator automatically starts oscillating after reset release. To use the 20 MHz internal high-speed
oscillator to operate the microcontroller, oscillation is started by setting bit 0 (DSCON) of the 20 MHz
internal high-speed oscillation control register (DSCCTL) to 1.
Note
CHAPTER 7 CLOCK GENERATOR
EX
= 2 to 20 MHz) can also be supplied from the EXCLK/X2/P122 pin. An external
SUB
Note
X
IH20
IH
= 2 to 20 MHz by connecting a resonator to X1 and X2.
= 32.768 kHz by connecting a 32.768 kHz resonator to XT1 and XT2.
= 1 and 8 MHz (TYP.). After a reset release, the CPU always starts
= 20 MHz (TYP.). Oscillation can be started by setting bit 0 (DSCON) of
Note
CHAPTER 7 CLOCK GENERATOR
DD
≥ 2.7 V. Oscillation can
338
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