UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 961

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(2) Delay from the time LVI reset source is generated until the time LVI reset has been generated or released
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Figure 23-12. Delay from the time LVI reset source is generated until the time LVI reset has been generated or released
There is some delay from the time supply voltage (V
generated.
In the same way, there is also some delay from the time LVI detection voltage (V
time LVI reset has been released (see Figure 23-12).
Operation example 2: When used as interrupt
Remark If bit 2 (LVISEL) of the low voltage detection register (LVIM) is set to “1”, the meanings of the above words
Supply voltage (V
<1>:
<Action>
voltage (V
interrupt by using bit 0 (LVIF) of the low-voltage detection register (LVIM). Clear bit 1 (LVIIF) of interrupt request
flag register 0L (IF0L) to 0.
after waiting for the supply voltage fluctuation time.
Confirm that “supply voltage (V
For a system with a long supply voltage fluctuation period near the LVI detection voltage, take the above action
LVI reset signal
Minimum pulse width (200
Interrupt requests may be generated frequently.
Take the following action.
change as follows.
• Supply voltage (V
• Detection voltage (V
LVIF flag
V
DD
DD
LVI
)
) < detection voltage (V
DD
)
LVI
μ
) → Detection voltage (V
<1>
s (MIN.))
→ Input voltage from the external input pin (EXLVI)
DD
) ≥ detection voltage (V
LVI
)” when detecting the rising edge of V
DD
) < LVI detection voltage (V
EXLVI
LVI
= 1.21 V)
)” when detecting the falling edge of V
CHAPTER 23 LOW-VOLTAGE DETECTOR
<1>
DD
LVI
LVI
, in the servicing routine of the LVI
) until the time LVI reset has been
) ≤ supply voltage (V
Time
DD
DD
, or “supply
) until the
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