UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 262

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
6.2.2 Port 1
mode register 1 (PM1). When the P10 to P17 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 1 (PU1).
port input mode register 1 (PIM1).
output mode register 1 (POM1).
time counter clock output.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
P10/SCK00
P11/SI00/RxD0
P12/SO00/TxD0
P13/TxD3
P14/RxD3
P15/RTCDIV/RTCCL
P16/TI01/TO01/INTP5
P17/TI02/TO02
Port 1 is an I/O port with an output latch. Port 1 can be set to the input mode or output mode in 1-bit units using port
Input to the P10 and P11 pins can be specified through a normal input buffer or a TTL input buffer in 1-bit units using
Output from the P10 and P12 pins can be specified as N-ch open-drain output (V
This port can also be used for external interrupt request input, serial interface data I/O, clock I/O, timer I/O, and real-
Reset signal generation sets port 1 to input mode.
Figures 6-6 to 6-12 show block diagrams of port 1.
Cautions 1. To use P10/SCK00, P11/SI00/RxD0, or P12/SO00/TxD0, P13/TxD3, P14/RxD3 as a general-purpose
2. To use P16/TI01/TO01/INTP5 or P17/TI02/TO02 as a general-purpose port, set bits 1 and 2 (TO01,
3. To use P15/RTCDIV/RTCCL as a general-purpose port, set bit 4 (RCLOE0) of real-time counter
port, note the serial array unit setting. For details, refer to the following tables.
TO02) of timer output register 0 (TO0) and bits 1 and 2 (TOE01, TOE02) of timer output enable
register 0 (TOE0) to “0”, which is the same as their default status setting.
control register 0 (RTCC0) and bit 6 (RCLOE2) of real-time counter control register 2 (RTCC2) to
“0”, which is the same as their default status settings.
• Table 14-9 Relationship Between Register Settings and Pins (Channel 0 of Unit 0: CSI00,
• Table 14-10 Relationship Between Register Settings and Pins (Channel 1 of Unit 0: CSI01,
• Table 14-15 Relationship Between Register Settings and Pins (Channel 2 of Unit 1: UART3
• Table 14-16 Relationship Between Register Settings and Pins (Channel 3 of Unit 1: UART3
UART0 Transmission)
UART0 Reception)
Transmission)
Reception)
(
μ
PD78F10xx: xx = 10, 11, 12,
78K0R/KF3-L
27, 28)
√
√
√
√
√
√
√
√
CHAPTER 6 PORT FUNCTIONS (78K0R/KF3-L, 78K0R/KG3-L)
(
μ
PD78F10xx: xx = 13, 14,
78K0R/KG3-L
29, 30)
√
√
√
√
√
√
√
√
DD
tolerance) in 1-bit units using port
262