UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 339

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
7.2 Configuration of Clock Generator
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
(3) Internal low-speed oscillation clock (clock dedicated to watchdog timer)
Remarks 1. f
The clock generator includes the following hardware.
Notes 1.
Control registers
Oscillators
• Internal low-speed oscillator
This circuit oscillates a clock of f
The internal low-speed oscillation clock cannot be used as the CPU clock. The only hardware that operates with
the internal low-speed oscillation clock is the watchdog timer.
Oscillation is stopped when the watchdog timer stops.
2.
2. The watchdog timer stops in the following cases.
The PER2 register is only mounted in the 78K0R/KC3-L, 78K0R/KD3-L, and 78K0R/KE3-L.
The 78K0R/KC3-L (40-pin) doesn’t have the XT1 oscillator (subsystem clock).
• When bit 4 (WDTON) of an option byte (000C0H) = 0
• If the HALT or STOP instruction is executed when bit 4 (WDTON) of an option byte (000C0H) = 1 and
Item
IL
: Internal low-speed oscillation clock frequency
bit 0 (WDSTBYON) = 0
Clock operation mode control register (CMC)
System clock control register (CKC)
Clock operation status control register (CSC)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
20 MHz internal high-speed oscillation control register (DSCCTL)
Peripheral enable registers 0, 1, 2
Operation speed mode control register (OSMC)
X1 oscillator
XT1 oscillator
Internal high-speed oscillator
Internal low-speed oscillator
Table 7-1. Configuration of Clock Generator
IL
= 30 kHz (TYP.).
Note 2
Note 1
(PER0, PER1, PER2
Configuration
CHAPTER 7 CLOCK GENERATOR
Note 1
)
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