UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 892

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
(3) Priority specification flag registers (PR00L, PR00H, PR01L, PR01H, PR02L, PR02H, PR10L, PR10H, PR11L,
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
PR11H, PR12L, PR12H)
The priority specification flag registers are used to set the corresponding maskable interrupt priority level.
A priority level is set by using the PR0xy and PR1xy registers in combination (xy = 0L, 0H, 1L, 1H, 2L, or 2H).
The PR00L, PR00H, PR01L, PR01H, PR02L, PR02H, PR10L, PR10H, PR11L, PR11H, PR12L, and the PR12H
registers can be set by a 1-bit or 8-bit memory manipulation instruction. If the PR00L and PR00H registers, the
PR01L and PR01H registers, the PR02L and PR02H registers, the PR10L and PR10H registers, the PR11L and
PR11H registers, and the PR12L and PR12H registers are combined to form 16-bit registers PR00, PR01, PR02,
PR10, PR11, and PR12, they can be set by a 16-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Remark If an instruction that writes data to this register is executed, the number of instruction execution clocks
Address: FFFE8H
Address: FFFECH
Address: FFFE9H
Address: FFFEDH
Address: FFFEAH
Address: FFFEEH
(PR00L, PR00H, PR01L, PR01H, PR02L, PR02H, PR10L, PR10H, PR11L, PR11H, PR12L, PR12H) (1/2)
Symbol
Symbol
Symbol
Symbol
Symbol
Symbol
PR00H
PR10H
PR00L
PR10L
PR01L
PR11L
increases by 2 clocks.
SREPR00
SREPR10
TMPR003
TMPR103
PPR05
PPR15
<7>
<7>
<7>
<7>
<7>
<7>
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
After reset: FFH
Figure 18-9. Format of Priority Specification Flag Registers
CSIPR001
CSIPR101
TMPR002
TMPR102
SRPR00
SRPR10
PPR04
PPR14
<6>
<6>
<6>
<6>
<6>
<6>
R/W
R/W
R/W
R/W
R/W
R/W
CSIPR000
CSIPR100
TMPR001
TMPR101
STPR00
STPR10
PPR03
PPR13
<5>
<5>
<5>
<5>
<5>
<5>
DMAPR01
DMAPR11
TMPR000
TMPR100
PPR02
PPR12
<4>
<4>
<4>
<4>
<4>
<4>
DMAPR00
DMAPR10
IICAPR0
IICAPR1
PPR01
PPR11
<3>
<3>
<3>
<3>
<3>
<3>
CHAPTER 18 INTERRUPT FUNCTIONS
SREPR03
SREPR13
SREPR01
SREPR11
PPR00
PPR10
<2>
<2>
<2>
<2>
<2>
<2>
SRPR03
SRPR13
SRPR01
SRPR11
LVIPR0
LVIPR1
<1>
<1>
<1>
<1>
<1>
<1>
CSIPR010
CSIPR110
WDTIPR0
WDTIPR1
IICPR010
IICPR110
STPR03
STPR13
STPR01
STPR11
<0>
<0>
<0>
<0>
<0>
<0>
892