UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 495

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Address: F00F0H
(1) Peripheral enable register 0 (PER0)
(2) Real-time counter control register 0 (RTCC0)
Symbol
PER0
This register is used to enable or disable supplying the clock to the peripheral hardware. Clock supply to a
hardware macro that is not used is stopped in order to reduce the power consumption and noise.
When the real-time counter is used, be sure to set bit 7 (RTCEN) of this register to 1.
The PER0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
The RTCC0 register is an 8-bit register that is used to start or stop the real-time counter operation, control the
RTCCL and RTC1HZ pins, and set a 12- or 24-hour system and the constant-period interrupt function.
The RTCC0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
RTCEN
RTCEN
Notes 1. That is not provided in 40-pin product of the 78K0R/KC3-L.
Cautions 1. When using the real-time counter, first set the RTCEN bit to 1, while oscillation of the
<7>
0
1
After reset: 00H
Note 1
Note 1
2. That is not provided in 40-pin and 44-pin products of the 78K0R/KC3-L.
3. 78K0R/KF3-L and 78K0R/KG3-L only.
4. The RTCEN bit is used to supply or stop the clock used when accessing the real-time counter
Stops input clock supply.
• SFR used by the real-time counter (RTC) cannot be written.
• The real-time counter (RTC) is in the reset status.
Enables input clock supply.
• SFR used by the real-time counter (RTC) can be read/written.
(RTC) register from the CPU. The RTCEN bit cannot control supply of the operating clock
(f
3. Be sure to clear the following bits to 0.
2. Clock supply to peripheral functions other than the real-time counter can be stopped
SUB
Figure 9-2. Format of Peripheral Enable Register 0 (PER0)
48-pin product of the 78K0R/KC3-L, 78K0R/KD3-L, 78K0R/KE3-L: bits 0, 1, 3, 6
44-pin product of the 78K0R/KC3-L:
40-pin product of the 78K0R/KC3-L:
78K0R/KF3-L, 78K0R/KG3-L:
subsystem clock (f
real-time counter is ignored, and, even if the register is read, only the default value is
read.
in HALT mode when the subsystem clock is used, by setting the RTCLPC bit of the
operation speed mode control register (OSMC) to 1. In this case, set the RTCEN bit
of the PER0 register to 1 and the other bits (bits 0 to 6) to 0. If using the 78K0R/KC3-
L, 78K0R/KD3-L, or 78K0R/KE3-L, set bits 0 to 7 of the PER1 and PER2 registers to 0
also.
) to RTC.
6
0
R/W
ADCEN
<5>
Control of real-time counter (RTC) input clock supply
SUB
IICAEN
) is stable. If RTCEN = 0, writing to a control register of the
<4>
Note 2
SAU1EN
<3>
bits 0, 1, 3, 4, 6
bits 0, 1, 3, 4, 6, 7
bit 6
Note 3
CHAPTER 9 REAL-TIME COUNTER
SAU0EN
<2>
TAU1EN
Note 4
<1>
Note 3
TAU0EN
<0>
Note 3
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